R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 374
![MCU FLASH 96K 5K CMOS 48-LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F2121AJFP#U0
Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F2121AJFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 17.11
17.4.3
IR bit in the TRAIC
TE bit in the U0C1
The bus collision detection function can be used when UART0 is enabled for transmission (TE bit in the U0C1
register = 1).
Figure 17.11 shows a Typical Operation when a Bus Collision is Detected.
BCDCT flag in the
LINCR register
LINST register
Transfer clock
LINE bit in the
Bus Collision Detection Function
RXD0 pin
TXD0 pin
register
register
Typical Operation when a Bus Collision is Detected
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Page 356 of 458
Set to 1 by a program
Set to 1 by a program
Cleared to 0 upon
acceptance of interrupt
request or by a program
Set by writing 1 to
the B2CLR bit in the
LINST register
17. Hardware LIN
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