R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 243

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.87
Timer RD Start Register
b7 b6 b5 b4 b3 b2
NOTES:
1.
2.
3.
4.
5.
Set the TRDSTR register using the MOV instruction (do not use the bit handling instruction). Refer to 14.3.12.1
TRDSTR Register of Notes on Tim er RD.
When the CSEL0 bit is set to 1, w rite 0 to the TSTART0 bit.
When the CSEL1 bit is set to 1, w rite 0 to the TSTART1 bit.
When the CSEL0 bit is set to 0 and generating the compare match signal(TRDIOA0), this bit is set to 0 (count stops).
When the CSEL1 bit is set to 0 and generating the compare match signal(TRDIOA1), this bit is set to 0 (count stops).
TRDSTR Register in Complementary PWM Mode
b1 b0
Bit Symbol
TSTART0
TSTART1
(b7 - b4)
TRDSTR
Symbol
CSEL0
CSEL1
Page 225 of 458
(1)
—
TRD0 count start flag
TRD1 count start flag
TRD0 count operation select bit 0 : Count stops at the compare match
TRD1 count operation select bit 0 : Count stops at the compare match
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Address
Bit Name
0137h
(4)
(5)
0 : Count stops
1 : Count starts
0 : Count stops
1 : Count starts
1 : Count continues at the compare
1 : Count continues at the compare
w ith the TRDGRA0 register
match w ith the TRDGRA0 register
w ith the TRDGRA1 register
match w ith the TRDGRA1 register
(2)
(3)
After Reset
11111100b
Function
14. Timers
RW
RW
RW
RW
RW
—