AT91M55800A-33CJ Atmel, AT91M55800A-33CJ Datasheet - Page 67

IC ARM MCU 16BIT 176BGA

AT91M55800A-33CJ

Manufacturer Part Number
AT91M55800A-33CJ
Description
IC ARM MCU 16BIT 176BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M55800A-33CJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
EBI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
58
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91EB55
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
8 bit, 2 Channel
Cpu Family
AT91
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
58
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
BGA
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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• MUL: Phase Lock Loop Factor
0 = The PLL is deactivated, reducing power consumption to a minimum.
1 - 63 = The PLL output is at a higher frequency (MUL+1) than the input if the bit lock is set in APMC_SR.
• CSS: Clock Source Selection
• OSCOUNT: Main Oscillator Counter
Specifies the number of 32,768 Hz divided by 8 clock cycles for the main oscillator start-up timer to count before the main
oscillator is stabilized, after the oscillator is enabled. The main oscillator counter is a down-counter which is preloaded with
the OSCOUNT value when the MOSCEN bit in the Clock Generator Mode register (CGMR) is set, but only if the
OSCOUNT value is different from 0x0.
• PLLCOUNT: PLL Lock Counter
Specifies the number of 32,768 Hz clock cycles for the PLL lock timer to count before the PLL is locked, after the PLL is
started. The PLL counter is a down-counter which is preloaded with the PLLCOUNT value when the MUL field in the Clock
Generator Mode register (CGMR) is modified, but only if the MUL value is different from 0 (PLL disabled) and also the
PLLCOUNT value itself different from 0x0. PLLCOUNT must be loaded with a minimum value of 2 in order to guarantee a
time of at least one slow clock period.
1745F–ATARM–06-Sep-07
0
0
1
1
CSS
0
1
0
1
Clock Source Selection
Low-frequency clock provided by the RTC
Main oscillator Output or external clock
Phase Lock Loop Output
Reserved
Code Label
APMC_CSS_LF
APMC_CSS_MOSC
APMC_CSS_PLL
AT91M5880A
67

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