AT91M55800A-33CJ Atmel, AT91M55800A-33CJ Datasheet - Page 27

• Manufacturer Part Number: AT91M55800A-33CJ
• Description: IC ARM MCU 16BIT 176BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M55800A-33CJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: EBI, SPI, USART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 58
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91EB55
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 8 bit, 2 Channel
• Cpu Family: AT91
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 33MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 8KB
• # I/os (max): 58
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 176
• Package Type: BGA
• For Use With: AT91EB55 - KIT EVAL FOR ARM AT91M55800A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.3
11.4
1745F–ATARM–06-Sep-07
Data Bus Width
Byte-write or Byte-select Access
A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled by
the DBW field in the EBI_CSR (Chip-select Register) for the corresponding chip select.
Figure 11-2
Figure 11-2. Memory Connection for an 8-bit Data Bus
Figure 11-3
Figure 11-3. Memory Connection for a 16-bit Data Bus
Each chip select with a 16-bit data bus can operate with one of two different types of write
access:
This option is controlled by the BAT field in the EBI_CSR (Chip-select Register) for the corre-
sponding chip select.
Byte-write Access is used to connect 2 x 8-bit devices as a 16-bit memory page.
Figure 11-4
• Byte-write Access supports two Byte-write and a single read signal.
• Byte-select Access selects upper and/or lower byte with two byte-select lines, and separate
• The signal A0/NLB is not used.
• The signal NWR1/NUB is used as NWR1 and enables upper byte writes.
• The signal NWR0/NWE is used as NWR0 and enables lower byte writes.
• The signal NRD/NOE is used as NRD and enables half-word and byte reads.
read and write signals.
shows how to connect a 512K x 8-bit memory on NCS2.
shows how to connect a 512K x 16-bit memory on NCS2.
shows how to connect two 512K x 8-bit devices in parallel on NCS2.
EBI
EBI
D8 - D15
A1 - A19
D0 - D7
D8 - D15
A1 - A18
NCS2
D0 - D7
NWE
NOE
NWR1
NWR0
NUB
NLB
NCS2
NRD
A0
D0 - D7
D8 - D15
A0 - A18
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
D0 - D7
A1 - A18
A0
Write Enable
Output Enable
Memory Enable
AT91M5880A
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