AT91M55800-33AI Atmel, AT91M55800-33AI Datasheet

IC ARM7 MCU 176 TQFP

AT91M55800-33AI

Manufacturer Part Number
AT91M55800-33AI
Description
IC ARM7 MCU 176 TQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91M55800-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-TQFP, 176-VQFP
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
AT91M5580033AI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91M55800-33AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Features
Description
The AT91M55800A is a member of the Atmel AT91 16/32-bit microcontroller family,
which is based on the ARM7TDMI processor core. This processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption. In addition, a large number of internally banked registers result in
very fast exception handling, making the device ideal for real-time control applications.
The fully programmable External Bus Interface provides a direct connection to off-chip
memory in as fast as one clock cycle for a read or write operation. An eight-level prior-
ity vectored interrupt controller in conjunction with the peripheral data controller
significantly improve the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with an on-chip SRAM, a wide range of peripheral
functions, analog interfaces and low-power oscillators on a monolithic chip, the Atmel
AT91M55800A is a powerful microcontroller that provides a highly-flexible and cost-
effective solution to many ultra low-power applications.
Utilizes the ARM7TDMI
8K Bytes Internal SRAM
Fully-programmable External Bus Interface (EBI)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
58 Programmable I/O Lines
6-channel 16-bit Timer/Counter
3 USARTs
Master/Slave SPI Interface
Programmable Watchdog Timer
8-channel 10-bit ADC
2-channel 10-bit DAC
Clock Generator with On-chip Main Oscillator and PLL for Multiplication
Real-time Clock with On-chip 32 kHz Oscillator
8-channel Peripheral Data Controller for USARTs and SPIs
Advanced Power Management Controller (APMC)
IEEE 1149.1 JTAG Boundary-scan on all Digital Pins
Fully Static Operation: 0 Hz to 33 MHz Internal Frequency Range
at VDDCORE = 3.0V, 85°C
2.7V to 3.6V Core Operating Range, 2.7V to 5.5V I/O Operating Range
2.7V to 3.6V Analog Operating Range
1.8V to 3.6V Backup Battery Operating Range
2.7V to 3.6V Oscillator and PLL Operating Range
-40°C to +85°C Temperature Range
Available in a 176-lead TQFP or 176-ball BGA Package
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-Circuit Emulation)
– Maximum External Address Space of 128M Bytes
– 8 Chip Selects
– Software Programmable 8/16-bit External Databus
– 7 External Interrupts, Including a High-priority, Low-latency Interrupt Request
– 6 External Clock Inputs and 2 Multi-purpose I/O Pins per Channel
– 8-bit to 16-bit Programmable Data Length
– 4 External Slave Chip Selects
– 3 to 20 MHz Frequency Range Main Oscillator
– Battery Backup Operation and External Alarm
– Normal, Wait, Slow, Standby and Power-down modes
ARM Thumb Processor Core
Note: This is a summary document. A complete document
is available on our web site at www.atmel.com.
AT91
ARM
Microcontrollers
AT91M55800A
Summary
®
Rev. 1745CS–ATARM–05/02
Thumb
®
1

Related parts for AT91M55800-33AI

AT91M55800-33AI Summary of contents

Page 1

... Available in a 176-lead TQFP or 176-ball BGA Package Description The AT91M55800A is a member of the Atmel AT91 16/32-bit microcontroller family, which is based on the ARM7TDMI processor core. This processor has a high-perfor- mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption ...

Page 2

... PA12/IRQ3 124 PA13/FIQ 125 PA14/SCK0 126 PA15/TXD0 127 PA16/RXD0 128 PA17/SCK1 129 PA18/TXD1/NTRI 130 VDDCORE 131 VDDCORE VDDIO 132 Pin AT91M55800A GND 133 GND GND 134 GND 135 NCS4 136 NCS5 137 NCS6 138 NCS7 139 PB0 140 PB1 141 PB2 ...

Page 3

... NCS3 F3 GND F4 TCK F5 JTAGSEL F6 GND F7 PB15 F8 PB14 F9 PB5 F10 PB1 F11 GND F12 VDDCORE F13 AD7 F14 VDDA F15 AT91M55800A Pin AT91M55800A A4 G1 A12 GND G4 GND – G5 – – G6 – – G7 – – G8 – – G9 – – G10 – – G11 – ...

Page 4

... P7 PB26/TIOA2 PB27/TIOB2 P8 PA2/TIOB3 PA0/TCLK3 P9 PA7/TIOA5 GND P10 PA10/IRQ1 PA23/SPCK P11 PA11/IRQ2 GND P12 PA21/TXD2 P13 PA17SCK1 PA24/MISO P14 PA18/TXD1/NTRI XIN P15 PA20/SCK2 Pin AT91M55800A D4 R1 D10 D6 R2 D11 VDDIO R3 D12 D14 R4 D13 R5 PB20/TIOA0 VDDIO R6 PB23/TIOA1 R7 PB24/TIOB1 R8 PA3/TCLK4 VDDIO R9 PA4/TIOA4 R10 PA5/TIOB4 ...

Page 5

... Figure 1. 176-lead TQFP Pinout Figure 2. 176-ball BGA Pinout 1745CS–ATARM–05/02 132 133 176 AT91M55800A ...

Page 6

... AD0 - AD7 Analog input channels AD0TRIG ADC0 external trigger ADC AD1TRIG ADC1 external trigger ADVREF Analog reference DA0 - DA1 Analog output channels DAC DAVREF Analog reference AT91M55800A 6 Active Type Level Comments Output – I/O – Output Low Output Low Used in Byte-write option ...

Page 7

... GNDBU Ground backup Power VDDCORE Digital core power VDDIO Digital I/O power VDDPLL Main oscillator and PLL power GND Digital ground GNDPLL PLL ground 1745CS–ATARM–05/02 AT91M55800A Active Type Level Comments Input – Output – Input – Input – Output – ...

Page 8

... Block Diagram Figure 3. AT91M55800A JTAGSEL NTRST TMS TDO TDI TCK PB0 PB1 PB2 PB5 PB8 P PB9 I PB10 PB11 O PB12 B PB13 PB14 PB15 PB16 PB17 PB3/IRQ4 PB4/IRQ5 PA9/IRQ0 PA10/IRQ1 PA11/IRQ2 PA12/IRQ3 PA13/FIQ PA14/SCK0 PA15/TXD0 PA16/RXD0 PA17/SCK1 PA18/TXD1/NTRI PA19/RXD1 P I PA20/SCK2 O PA21/TXD2 A PA22/RXD2 ...

Page 9

... ARM7TDMI processor with the on-chip 32-bit memories, the External Bus Interface (EBI) and the AMBA accesses to on-chip peripherals and optimized for low power consumption. The AT91M55800A microcontroller implements the ICE port of the ARM7TDMI proces- sor on dedicated pins, offering a complete, low cost and easy-to-use debug solution for target debugging. ...

Page 10

... The data length is programmable, from 8- to 16-bit. The two identical 4-channel 10-bit analog-to-digital converters (ADC) are based on a Successive Approximation Register (SAR) approach. The two identical single-channel 10-bit digital-to-analog converters (DAC). AT91M55800A 10 1745CS–ATARM–05/02 ...

Page 11

... Peripheral operations Peripheral user interfaces DC characteristics AT91M55800A Power consumption Thermal and reliability considerations AC characteristics Product overview Ordering information Packaging information Soldering profile 1745CS–ATARM–05/02 AT91M55800A Document Title ARM7TDMI (Thumb) Datasheet AT91M55800A Datasheet AT91M55800A Electrical Characteristics AT91M55800A Summary Datasheet (this document) 11 ...

Page 12

... Input/Output After the reset, the peripheral I/Os are initialized as inputs to provide the user with maxi- mum flexibility recommended that in any application phase, the inputs to the Considerations AT91M55800A microcontroller be held at valid logic levels to minimize the power consumption. AT91M55800A 12 VDDCORE pins, which power the chip core ...

Page 13

... NRST pin has priority. Emulation Functions Tri-state Mode The AT91M55800A provides a Tri-state Mode, which is used for debug purposes. This enables the connection of an emulator probe to an application board without having to desolder the device from the target board. In Tri-state Mode, all the output pin drivers of the AT91M55800A microcontroller are disabled ...

Page 14

... The ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91M55800A microcontroller uses a remap command that enables switching between the boot mem- ory and the internal RAM bank addresses ...

Page 15

... Data bus width (8-bit or 16-bit) With a 16-bit wide data bus, the user can program the EBI to control one 16-bit device (Byte Access Select Mode) or two 8-bit devices in parallel that emulate a 16- bit memory (Byte-write Access mode). AT91M55800A 15 ...

Page 16

... Peripherals The AT91M55800A peripherals are connected to the 32-bit wide Advanced Peripheral Bus. Peripheral registers are only word accessible. Byte and half-word accesses are not supported byte or a half-word access is attempted, the memory controller automati- cally masks the lowest address bits and generates a word access. ...

Page 17

... PIO: Parallel I/O Controller The AT91M55800A has 58 programmable I/O lines. 13 pins are dedicated as general- purpose I/O pins. The other I/O lines are multiplexed with an external signal of a periph- eral to optimize the use of available package pins. The PIO lines are controlled by two separate and identical PIO Controllers called PIOA and PIOB ...

Page 18

... PDC, and a Time-guard register, used when interfac- ing with slow remote equipment. TC: Timer/Counter The AT91M55800A features two Timer/Counter blocks that include three identical 16-bit timer/counter channels. Each channel can be independently programmed to perform a wide range of functions including frequency measurement, event counting, interval mea- surement, pulse generation, delay timing and pulse-width modulation ...

Page 19

... Ordering Information Table 7. Ordering Information Ordering Code AT91M55800A-33AI AT91M55800A-33CI 1745CS–ATARM–05/02 Package Operating Range TQFP 176 (-40°C to 85°C) BGA 176 AT91M55800A Temperature Industrial 19 ...

Page 20

... Packaging Information Figure 4. 176-lead Thin Quad Flat Pack Package Drawing aaa PIN 1 θ2 θ3 ddd AT91M55800A 20 ccc bbb 0.25 θ θ1 L1 1745CS–ATARM–05/02 ...

Page 21

... Tolerances of form and position 0.2 0 Nom Max Min Nom 0.20 0.27 0.17 0.20 mg AT91M55800A Max 0.20 0.16 0.75 0.2 7° 13° 13° 1.6 0.15 1.45 e Max BSC ccc ddd 0.23 0.50 0.10 0.08 21 ...

Page 22

... Figure 5. 176-ball Ball Grid Array Package Drawing Top View Table 11. Device and 176-ball BGA Package Maximum Weight 606 AT91M55800A 22 Bottom View Symbol Maximum aaa 0.1 bbb 0.1 ddd 0.1 eee 0.03 fff 0.04 ggg 0.03 hhh 0.1 kkk 0.1 Notes: 1. Package dimensions conform to JEDEC MO-205 2 ...

Page 23

... By default, the package level 1 is qualified at 220°C (unless 235°C is stipulated). 3. The body temperature is the most important parameter but other profile parameters such as total exposure time to hot temperature or heating rate may also influence component reliability. AT91M55800A Convection or IR/Convection VPR 3° ...

Page 24

... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...

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