AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 728

• Manufacturer Part Number: AT91SAM9260B-CU-999
• Description: IC MCU ARM9 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9260B-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

40.4.1
40.4.2
728
AT91SAM9260
Power Sequence Requirements
Power-up Sequence
The AT91SAM9260 board design must comply with the power-up and power-down sequence
guidelines below to guarantee reliable operation of the device. Any deviation from these
sequences may lead to prevent the device from booting.
Figure 40-2. V
VDDCORE and VDDBU are controlled by internal POR (Power On Reset) to guarantee that
these power sources reach their target values prior to the release of POR.
The T
(44KHz).
• VDDIOM, VDDIOP0 and VDDIOP1 must NOT be powered until VDDCORE has reached a
• VDDIOP0 must be ≥ V
• VDDIOM must reach V
level superior to
after VDDCORE reached
+ T2) after VDDCORE has reached
– T
– T1 = 3 x T
– T2 = 16 x T
SLCK
– T
– T1 = 66 µs
– T2 = 352 µs
Core Supply POR output
VDDCOREtyp
RES
RES
min (22 µs) is obtained for the maximum frequency of the internal RC oscillator
VDDIOtyp
VDD (V)
is a POR characteristic
= 100 µs
SLCK
Vth+
Voh
Vih
VDDCORE
SLCK
SLCK
V
th+
.
and V
IH
OH
(refer to DC characteristics table for more details) within (Tres + T1)
(refer to DC characteristics table for more details) within (Tres + T1
V
th+
VDDIO
.
Constraints at Startup
V
th+
<--Tres ->
<T1>
<------------ T2 ----------->
VDDIO > V oh
6221I–ATARM–17-Jul-09
VDDCORE
VDDIO
t