ATMEGA645A-AU Atmel, ATMEGA645A-AU Datasheet - Page 39
![IC MCU AVR 64K FLASH 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA645A-AU
Manufacturer Part Number
ATMEGA645A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA645A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA645A-AUR
Manufacturer:
HONEYWELL
Quantity:
101
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9. Power Management and Sleep Modes
9.1
9.2
Table 9-1.
9.3
8285B–AVR–03/11
Sleep Mode
Idle
ADC NRM
Power-down
Power-save
Standby
Overview
Sleep Modes
BOD Disable
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
(1)
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
Figure 8-1 on page 29
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P, and their distribu-
tion. The figure is helpful in selecting an appropriate sleep mode.
sleep modes and their wake up sources and BOD disable ability
Note:
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses - see
322
period. To save power, it is possible to disable the BOD by software for some of the sleep-
modes, see
level as when BOD is globally disabled by fuses. If BOD is disabled in software, the BOD func-
and onwards, the BOD is actively monitoring the power supply voltage during a sleep
X
1. BOD disable is only available for ATmega165PA/325PA/3250PA/645P/6450P
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
Table 9-1 on page
X
X
X
X
X
presents the different clock systems in the
Oscillators
X
X
X
39. The sleep mode power consumption will then be at the same
X
X
X
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
X
X
X
X
X
Wake-up Sources
X
X
X
(2)
(1)
.
Table 9-1
Table 9-2 on page 44
X
X
X
X
Table 27-7 on page
shows the different
X
for a
X
X
X
39
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