ATMEGA645A-AU Atmel, ATMEGA645A-AU Datasheet - Page 107

IC MCU AVR 64K FLASH 64TQFP

ATMEGA645A-AU

Manufacturer Part Number
ATMEGA645A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA645A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14.9.2
14.9.3
14.9.4
8285B–AVR–03/11
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
TIMSK0 – Timer/Counter 0 Interrupt Mask Register
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
Table 14-6.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a compare match between TCNT0 and the OCR0A Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
• Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
Bit
0x26 (0x46)
Read/Write
Initial Value
Bit
0x27 (0x47)
Read/Write
Initial Value
Bit
(0x6E)
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
Clock Select Bit Description
R/W
R/W
R
7
0
7
0
7
0
CS00
0
1
0
1
0
1
0
1
R/W
R/W
R
6
0
6
0
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
R
5
0
5
0
5
0
R/W
R/W
R
4
0
4
0
4
0
OCR0A[7:0]
TCNT0[7:0]
R/W
R/W
R
3
0
3
0
3
0
R/W
R/W
R
2
0
2
0
2
0
OCIE0A
R/W
R/W
R/W
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
0
0
0
0
0
0
OCR0A
TIMSK0
TCNT0
107

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