ATMEGA645A-AU Atmel, ATMEGA645A-AU Datasheet - Page 109
![IC MCU AVR 64K FLASH 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA645A-AU
Manufacturer Part Number
ATMEGA645A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA645A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA645A-AUR
Manufacturer:
HONEYWELL
Quantity:
101
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15. 16-bit Timer/Counter1
15.1
15.2
8285B–AVR–03/11
Features
Overview
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
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The 16-bit Timer/Counter unit allows accurate program execution timing (event management),
wave generation, and signal timing measurement. Most register and bit references in this sec-
tion are written in general form. A lower case “n” replaces the Timer/Counter number, and a
lower case “x” replaces the Output Compare unit number. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT1 for accessing
Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in
p l a c e m e n t o f I / O p i n s , r e f e r t o
ATmega165A/ATmega165PA/ATmega325A/ATmega325PA/ATmega645A/ATmega645P” on
page
device-specific I/O Register and bit locations are listed in the
130.
The PRTIM1 bit in
enable Timer/Counter1 module
True 16-bit Design (i.e., Allows 16-bit PWM)
Two independent Output Compare Units
Double Buffered Output Compare Registers
One Input Capture Unit
Input Capture Noise Canceler
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
External Event Counter
Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
2. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The
”PRR – Power Reduction Register” on page 45
” 6 4 A ( T Q F P ) a n d 6 4 M 1 ( Q F N / M L F ) P i n o u t
”Register Description” on page
Figure
must be written to zero to
15-1. For the actual
109
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