ATMEGA645A-AU Atmel, ATMEGA645A-AU Datasheet - Page 284

• Manufacturer Part Number: ATMEGA645A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.2
284
Fuse Bits
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Table 26-2.
Notes:
The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P has three
Fuse bytes.
they are mapped into the Fuse bytes. Note that the fuses are read as logical zero, “0”, if they are
programmed.
Table 26-3.
Notes:
–
–
–
–
BODLEVEL2
BODLEVEL1
BODLEVEL0
RSTDISBL
Fuse Low Byte
BLB1 Mode
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
1. See
2. Port G, PG5 is input only. Pull-up is always on.
Memory Lock Bits
(2)
84.
Table 26-3
(1)
(1)
(1)
Lock Bit Protection Modes
Extended Fuse Byte
Table 27-16 on page 327
BLB12
1
1
0
0
Bit No
7
6
5
4
3
2
1
0
-
Table 26-5
BLB11
Description
–
–
–
–
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
External Reset Disable
1
0
0
1
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
describe briefly the functionality of all the fuses and how
for BODLEVEL Fuse decoding.
(1)(2)
(Continued)
See ”Alternate Functions of Port G” on page
Default Value
1
1
1
1
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
8285B–AVR–03/11