ATMEGA645A-AU Atmel, ATMEGA645A-AU Datasheet - Page 248

• Manufacturer Part Number: ATMEGA645A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.5.5
Table 24-3.
248
Signal Name
COMP
ACLK
ACTEN
ADCBGEN
ADCEN
AMPEN
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Scanning the ADC
Boundary-scan Signals for the ADC
Direction as seen
from the ADC
Output
Input
Input
Input
Input
Input
Figure 24-9 on page 248
observe signals. The Boundary-scan cell from
these signals. The ADC need not be used for pure connectivity testing, since all analog inputs
are shared with a digital port pin as well.
Figure 24-9. Analog to Digital Converter
The signals are described briefly in
NEGSEL_2
NEGSEL_1
NEGSEL_0
MUXEN_7
MUXEN_6
MUXEN_5
MUXEN_4
MUXEN_3
MUXEN_2
MUXEN_1
MUXEN_0
EXTCH
ADC_7
ADC_6
ADC_5
ADC_4
ADC_3
ADC_2
ADC_1
ADC_0
Description
Comparator Output
Clock signal to differential amplifier
implemented as Switch-cap filters
Enable path from differential
amplifier to the comparator
Enable Band-gap reference as
negative input to comparator
Power-on signal to the ADC
Power-on signal to the differential
amplifier
ADC_2
ADC_1
ADC_0
SCTEST
AMPEN
ACLK
(1)
ST
To Comparator
shows a block diagram of the ADC with all relevant control and
+
-
1x
Table 24-3 on page
ADCBGEN
VCCREN
IREFEN
AREF
PASSEN
Recommended
Input when not
in Use
ACTEN
1.22V
GNDEN
ref
Figure 24-5 on page 245
1.11V
ref
0
0
0
0
0
0
248.
PRECH
DAC_9..0
ADCEN
HOLD
Output Values when
recommended inputs are Used,
and CPU is not Using the ADC
PRECH
AREF
10-bit DAC
is attached to each of
AREF
0
0
0
0
0
0
+
-
8285B–AVR–03/11
DACOUT
COMP
COMP