AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 606
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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26.6.12
26.6.13
26.6.14
26.6.15
26.7
32099F–11/2010
Resistive Touch Screen
Interrupt Operation
Peripheral Events
Sleep Mode
Conversion Performances
Else (CELSE) interrupt. To generate an interrupt request if a value is outside a range, write the
LV and HV fields to the low and high limits of the range and enable CGT and CLT interrupts.
Note that the values written to LV and HV must match the resolution selected in the ADC Config-
uration Register (ACR).
Interrupt requests are enabled by writing a one to the corresponding bit in the Interrupt Enable
Register (IER) and disabled by writing a one to the corresponding bit in the Interrupt Disable
Register (IDR). Enabled interrupts can be read from the Interrupt Mask Register (IMR). Active
interrupt requests, but potentially masked, are visible in the Interrupt Status Register (ISR). To
clear an active interrupt request, write a one to the corresponding bit in the Interrupt Clear Reg-
ister (ICR).
The source for the interrupt requests are the status bits in the Status Register (SR). The SR
shows the ADCIFB status at the time the register is read. The Interrupt Status Register (ISR)
shows the status since the last write to the Interrupt Clear Register. The combination of ISR and
SR allows the user to react to status change conditions but also allows the user to read the cur-
rent status at any time.
The Peripheral Event System can be used together with the ADCIFB to allow any peripheral
event generator to be used as a trigger source. To enable peripheral events to trigger a conver-
sion sequence the user must write the Peripheral Event Trigger value (0x7) to the Trigger Mode
(TRGMOD) field in the Trigger Register (TRGR). Refer to
must also configure a peripheral event generator to emit peripheral events for the ADCIFB to
trigger on. Refer to the Peripheral Event System chapter for details.
Before entering sleep modes the user must make sure the ADCIFB is idle and that the Analog-
to-Digital Converter cell is inactive. To deactivate the Analog-to-Digital Converter cell the SLEEP
bit in the ADC Configuration Register (ACR) must be written to one and the ADCIFB must be
idle. To make sure the ADCIFB is idle, write a zero the Trigger Mode (TRGMOD) field in the
Trigger Register (TRGR) and wait for the READY bit in the Status Register (SR) to be set.
Note that by deactivating the Analog-to-Digital Converter cell, a startup time penalty as defined
in the STARTUP field in the ADC Configuration Register (ACR) will apply on the next
conversion.
For performance and electrical characteristics of the ADCIFB, refer to the Electrical Characteris-
tics chapter.
The ADCIFB embeds an integrated Resistive Touch Screen Sequencer that can be used to cal-
culate contact coordinates on a resistive touch screen film. When instructed to start, the
integrated Resistive Touch Screen Sequencer automatically applies a sequence of voltage pat-
terns to the resistive touch screen films and the Analog-to-Digital Conversion cell is used to
measure the effects. The resulting measurements can be used to calculate the horizontal and
vertical contact coordinates. It is recommended to use a high resistance touch screen for optimal
resolution.
AT32UC3L016/32/64
Table 26-4 on page
619. The user
606
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