AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 186
![MCU AVR32 64KB FLASH 48TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 186 of 858
- Download datasheet (13Mb)
13.5.2
13.5.3
32099F–11/2010
32KHz Oscillator (OSC32K) Operation
Digital Frequency Locked Loop (DFLL) Operation
The SCIF masks the oscillator outputs during the start-up time, to ensure that no unstable clocks
propagate to the digital logic.
The OSCn Ready bit (OSCnRDY) in the Power and Clock Status Register (PCLKSR) is set
when the oscillator is stable and ready to be used as clock source. An interrupt can be gener-
ated on a zero-to-one transition on OSCnRDY.
Rev: 1.0.1.0
The 32KHz oscillator operates as described for the oscillator above. The 32KHz oscillator can
be used as source clock for the Asynchronous Timer (AST) and the Watchdog Timer (WDT).
The 32KHz oscillator can be used as source for the generic clocks.
The oscillator is disabled by default after reset. When the oscillator is disabled, the XIN32 and
XOUT32 pins can be used as general-purpose I/Os. When the oscillator is configured to use an
external clock, the clock must be applied to the XIN32 pin while the XOUT32 pin can be used as
general-purpose I/O.
The oscillator is enabled writing a one to the OSC32 Enable bit (OSC32EN) bit in the 32 KHz
Oscillator Control Register (OSCCTRL32). Operation mode (external clock or crystal) is chosen
by writing to the Oscillator Mode (MODE) bit in OSCCTRL32. The oscillator is an ultra-low-
power design and remains enabled in all sleep modes.
The start-up time of the 32KHz oscillator is selected by writing to the Oscillator Start-up Time
field (STARTUP) in the OSCCTRL32 register. The SCIF masks the oscillator output during the
start-up time, to ensure that no unstable clock cycles propagate to the digital logic.
The OSC32 Ready bit (OSC32RDY) in the Power and Clock Status Register (PCLKSR) is set
when the oscillator is stable and ready to be used as clock source. An interrupt can be gener-
ated on a zero-to-one transition on OSC32RDY.
As a crystal oscillator usually requires a very long start-up time (up to 1 second), the 32 KHz
oscillator will keep running across resets, except Power-On-Reset (POR).
The 32KHz oscillator also has a 1KHz output. This is enabled by writing a one to the Enable
1 KHz output bit (EN1K) in OSCCTRL32 register. If the 32KHz output clock is not needed when
1K is enabled, this can be disabled by writing a zero to the Enable 32 KHz output bit (EN32K) in
the OSCCTRL32 register. EN32K is set after a POR.
The 32 KHz oscillator has two possible sets of pins. To select between them write to the Pin
Select bit (PINSEL) in the OSCCTRL32 register. If the 32 KHz oscillator is to be used in Shut-
down mode, PINSEL have to be written to one, and XIN32_2 and XOUT32_2 has to be used.
Rev: 2.0.1.0
The DFLL is controlled by the Digital Frequency Locked Loop Interface (DFLLIF). The DFLL is
disabled by default, but can be enabled to provide a high-frequency source clock for synchro-
nous and generic clocks.
Features:
• Internal oscillator with no external components
AT32UC3L016/32/64
186
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