AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 326
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 326 of 858
- Download datasheet (13Mb)
18. General-Purpose Input/Output Controller (GPIO)
18.1
18.2
18.3
32099F–11/2010
Features
Overview
Block Diagram
Version: 2.1.1.5
•
The General Purpose Input/Output Controller (GPIO) controls the I/O pins of the microcontroller.
Each GPIO pin may be used as a general-purpose I/O or be assigned to a function of an embed-
ded peripheral.
The GPIO is configured using the Peripheral Bus (PB). Some registers can also be configured
using the low latency CPU Local Bus. See
Figure 18-1. GPIO Block Diagram
Each GPIO line features:
– Configurable pin-change, rising-edge, or falling-edge interrupt
– Configurable peripheral event generator
– Glitch filter providing rejection of pulses shorter than one clock cycle
– Input visibility and output control
– Multiplexing of peripheral functions on I/O pins
– Programmable internal pull-up resistor
– Optional locking of configuration to avoid accidental reconfiguration
Power Manager
Controller
Interrupt
Embedded
Peripheral
Configuration
GPIO Interrupt
CLK_GPIO
Interface
Request
Pin Control
Signals
Input/Output - GPIO
General Purpose
Section 18.6.2.7
AT32UC3L016/32/64
for details.
PIN
PIN
PIN
PIN
PIN
MCU
Pins
I/O
326
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