AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 523
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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• SMBPECERR: SMBus PEC Error
• SMBTOUT: SMBus Timeout
• NAK: NAK Received
• ORUN: Overrun
• URUN: Underrun
• TRA: Transmitter Mode
• TCOMP: Transmission Complete
• SEN: Slave Enabled
• TXRDY: TX Buffer Ready
• RXRDY: RX Buffer Ready
32099F–11/2010
This bit is set when SMBus PEC error has occurred.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when SMBus timeout has occurred.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when NAK was received from master during slave transmitter operation.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when overrun has occurred in slave receiver mode. Can only occur if CR.STREN=0.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when underrun has occurred in slave transmitter mode. Can only occur if CR.STREN=0.
This bit is cleared when the corresponding bit in SCR is written to one.
0: The slave is in slave receiver mode.
1: The slave is in slave transmitter mode.
This bit is set when transmission is complete. Set after receiving a STOP after being addressed.
This bit is cleared when the corresponding bit in SCR is written to one.
0: The slave interface is disabled.
1: The slave interface is enabled.
0: The TX buffer is full and should not be written to.
1: The TX buffer is empty, and can accept new data.
0: No RX data ready in RHR.
1: RX data is ready to be read from RHR.
AT32UC3L016/32/64
523
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