M30833FJFP#U3 Renesas Electronics America, M30833FJFP#U3 Datasheet - Page 69

• Manufacturer Part Number: M30833FJFP#U3
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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5. Reset
5.1 Hardware Reset
e
E
3
. v
J
Figure 5.1 Reset Circuit
2
0
Hardware reset, software reset, and watchdog timer reset are available to reset the microcomputer.
5.1.1 Reset on a Stable Supply Voltage
5.1.2 Power-on Reset
Figure 5.1 shows a reset circuit. Figure 5.2 shows a reset sequence. Figure 5.3 shows CPU register condi-
tions after reset. Table 5.1 lists pin states while the RESET pin is held "L". Refer to 4. SFR for SFR states
after reset.
1
9
C
3 .
B
The microcomputer resets pins, the CPU and SFR when the supply voltage meets the recommended
performance conditions while an "L" signal is applied to the RESET pin (see Table 5.1). Apply an "H"
signal to the RESET pin again after 20 or more clock cycles are input to the X
to the RESET pin. The CPU and SFR are reset and programs run from the address indicated by the reset
vector.
The internal RAM is not reset. When the RESET pin becomes "L" while writing data to the internal RAM,
the internal RAM is in an indeterminate state.
The microcomputer resets pins, the CPU and SFR when the supply voltage applied to the V
the recommended performance conditions while an "L" signal is applied to the RESET pin. (See Table
5.1.)
The CPU and SFR are reset when the signal applied to the RESET pin changes low ("L") to high ("H")
after the main clock oscillation stabilizes and 20 or more clock cycles are applied to the X
run from the address indicated by the reset vector. The internal RAM is in a indeterminate state
8 /
0
1
3
0
3
J
G
4
a
0 -
n
o r
____________
3 .
1
u
3
, 1
p
1
2
(
M
The above applies to V
0
____________
0
3
RESET
6
2
C
8 /
Page 44
, 3
M
3
2
C
f o
V
8 /
CC
4
3
8
) T
8
CC
= 5V
RESET
____________
V
5V
0V
5V
0V
CC
____________
Supply a clock with 20 or more cycles to
the X
IN
pin
____________
___________
Recommended
Operation Voltage
0.2V
CC
or below
IN
pin while applying an "L"
___________
IN
pin. Programs
CC
pin meets
5. Reset