M30833FJFP#U3 Renesas Electronics America, M30833FJFP#U3 Datasheet - Page 420

• Manufacturer Part Number: M30833FJFP#U3
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
3
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J
Figure 25.4 FMR0 Register
2
0
1
9
C
3 .
B
8 /
25.3.1.1 FMR00 Bit
25.3.1.2 FMR01 Bit
0
1
25.3.1 Flash Memory Control Register 0 (FMR0 Register)
3
0
The FMR00 bit indicates the write status machine (WSM) operation state during an auto write and
auto erase operation. The FMR00 bit is set to "0" during an auto write or auto erase operation and is
set to "1" when an auto write or auto erase operation is completed. The FMR00 bit changes while
executing the page program, block erase, erase all unlocked block or lock bit program command.
Determine whether the auto write or erase operation is completed by reading the FMR00 bit . The
FMR00 bit is changed by the above commands only.
Commands can be accepted when the FMR01 bit is set to "1" (CPU rewrite mode). To set the FMR01
bit to "1", set to "1" immediately after setting it to "0". To set the FMR01 bit to "0", set it to "0".
CPU rewrite mode is entered by setting the FMR01 bit to "1" and programs in the flash memory cannot
be executed. Execute an instruction written to this bit in a space (internal RAM, etc.) other than the
flash memory.
If a command for CPU rewrite mode is executed in boot mode, set the FMR05 bit to "1" (user ROM
area access).
3
Figure 25.4 shows the FMR0 register.
J
G
4
a
Flash Memory Control Register 0
b7
0 -
n
o r
NOTES:
3 .
1
u
b6
, 1
3
p
1. Set this bit to "1" immediately after setting it to "0". Do not generate an interrupt or a DMA transfer
2. Set the FMR05 bit by program in a space other than the flash memory.
3. When the FMR01 bit is set to "0", the FMR02 bit is also set to "0" simultaneously.
4. The FMR02 bit can be set only when the FMR01 bit is set to "1".
5. When the FMR01 bit is set "0", set the FMR03 bit to "0".
6. Set the FMR05 bit while applying "H" to the NMI pin.
1
2
(
Access the FMR03 bit when the FMR01 bit is set to "1".
b5
between setting the bit to "0" and setting it to "1". Write "0" to this bit when setting it to "0".
M
0
0
3
b4
6
0
2
C
b3
Page 395
8 /
, 3
b2
M
b1
3
2
b0
C
f o
8 /
(b7 - b6)
FMR00
FMR01
FMR02
FMR03
FMR05
4
Symbol
3
8
(b4)
) T
Bit
8
Symbol
FMR0
Flash Memory Reset Bit
Reserved Bit
User ROM Area Select
Bit (Available in boot
mode only)
RY/BY Signal
Status Bit
CPU Rewrite Mode
Select Bit
Lock Bit Disable Bit
Noting is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
(1, 6)
(2, 6)
0057
Address
16
(1, 3, 4)
(5)
By setting the bit to "1" just after setting it to "0",
a flash memory access is interrupted to reset the
flash memory control circuit
0 : BUSY (auto-writing, auto-erasing)
1 : READY (auto-write completed, auto-erase
0 : Disables CPU rewrite mode
1 : Enables CPU rewrite mode
0 : Enables the lock bit
1 : Disables the lock bit
Set to"0"
0: Access the boot ROM area
1: Access the user ROM area
completed)
Function
After Reset
XX00 0001
2
25. Flash Memory Version
RW
RW
RW
RW
RW
RW
RO