D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 774

• Manufacturer Part Number: D6417709SF167BV
• Description: IC SUPER H MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417709SF167BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

CS6 to CS2, CS0
RD
RD/WR
BS
RAS3U/PTE[2]
RAS3L/PTJ[0]
CASL/PTJ[2]
CASU/PTJ[3]
WE0/DQMLL
WE1/DQMLU/WE
WE2/DQMUL/
ICIORD/PTK[6]
WE3/DQMUU/
ICIOWR/PTK[7]
CE2A/PTE[4]
CE2B/PTE[5]
CKE/PTK[5]
WAIT
IOIS16/PTG[7]
A25 to A0
D7 to D0
D15 to D8
D23 to D16
D31 to D24
Notes: 1. Disabled when WCR2 register wait setting is 0.
Rev. 5.00, 09/03, page 728 of 760
2. Unused data pins should be switched to the port function, or pulled up.
Pin
W High
W Low
W High
W High
W High
W Low
R Low
R High
R High
R High
R High
R High
Enabled
Enabled
High
High
High
High
High
High
Disabled
Enabled
Disabled
Address
Invalid
data
Invalid
data
Invalid
data
Valid
data
(Address
Access
Byte
4n)
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
High
High
Low
High
High
High
High
Disabled
Enabled
Disabled
Address
Invalid
data
Invalid
data
Valid
data
Invalid
data
(Address
Access
4n + 1)
Byte
* 1
Disabled
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
High
Disabled
Enabled
Address
Invalid
data
Valid
data
Invalid
data
Invalid
data
(Address
Access
4n + 2)
Byte
32-Bit Bus Width
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
Low
High
High
High
High
High
High
High
High
Disabled
Enabled
Disabled
Address
Valid
data
Invalid
data
Invalid
data
Invalid
data
(Address
Access
4n + 3)
Byte
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
High
High
Low
High
Low
High
High
Disabled
Enabled
Disabled
Address
Invalid
data
Invalid
data
Valid
data
Valid
data
(Address
Access
Word
4n)
* 1
Disabled
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
Low
High
Low
High
High
High
High
High
High
Disabled
Enabled
Address
Valid
data
Valid
data
Invalid
data
Invalid
data
(Address
Access
4n + 2)
Word
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
Low
High
Low
High
Low
High
Low
High
High
Disabled
Enabled
Disabled
Address
Valid
data
Valid
data
Valid
data
Valid
data
Longword
Access
* 1