D6417709SF167BV Renesas Electronics America, D6417709SF167BV Datasheet - Page 464
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123112/d6417709sf167bv_sml.jpg)
D6417709SF167BV
Manufacturer Part Number
D6417709SF167BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SF167BV
Core Processor
SH-3
Core Size
32-Bit
Speed
167MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SF167BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 464 of 809
- Download datasheet (5Mb)
13.2.13 Date Alarm Register (RDAYAR)
The date alarm register (RDAYAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded date section counter RDAYCNT of the RTC. When the ENB bit
is set to 1, a comparison with the RDAYCNT value is performed. From among the registers
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 01–31 (decimal) + ENB bit. Errant operation will result if any other
value is set. The RDAYCNT range that can be set changes with some months and in leap years.
Please confirm the correct setting.
The ENB bit in RDAYAR is initialized by a power-on reset. The remaining RDAYAR fields are
not initialized and retain their contents by a manual reset, or in standby mode.
13.2.14 Month Alarm Register (RMONAR)
The month alarm register (RMONAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded month section counter RMONCNT of the RTC. When the ENB
bit is set to 1, a comparison with the RMONCNT value is performed. From among the registers
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 01–12 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RMONAR is initialized by a power-on reset. The remaining RMONAR fields are
not initialized and retain their contents by a manual reset, or in standby mode.
Rev. 5.00, 09/03, page 418 of 760
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
ENB
ENB
R/W
R/W
7
0
7
0
—
—
R
R
6
0
6
0
R/W
—
—
R
5
5
0
10 days
months
R/W
R/W
10
—
—
4
4
R/W
R/W
—
—
3
3
R/W
R/W
—
—
2
2
1 month
1 day
R/W
R/W
—
—
1
1
R/W
R/W
—
—
0
0
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