MC68332GVEH25 Freescale Semiconductor, MC68332GVEH25 Datasheet - Page 257

• Manufacturer Part Number: MC68332GVEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GVEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 132-QFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MC68332
USER’S MANUAL
R[8:0]/T[8:0]
Mnemonic
SHEN[1:0]
RASP[1:0]
SWT[1:0]
RAMDS
RR[0:F]
RSTEN
SLOCK
SPACE
TR[0:F]
SLVEN
STEXT
TCR1P
TCR2P
SPIFIE
STSIM
SLIMP
SCBR
RDRF
SPBR
SRBK
STOP
STRB
SUPV
T2CG
TDRE
T[1:0]
TPUF
RWU
SWE
SWP
TCIE
SPIF
RAF
SBK
SPE
SYS
PTP
R/W
STF
TST
RIE
SW
TIE
RE
TC
TE
S
Table D-8 Register Bit and Field Mnemonics (Continued)
Stop Mode System Integration Clock
Transmit Complete Interrupt Enable
Service Request Breakpoint Flag
Freescale Semiconductor, Inc.
Periodic Timer Prescaler Control
Transmit Data Register Empty
SPI Finished Interrupt Enable
Software Watchdog Prescale
Address Strobe/Data Strobe
Factory Test Mode Enabled
SCI Receive/Transmit Data
Software Watchdog Enable
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Software Watchdog Timing
Receive Data Register Full
Software Watchdog Reset
Stop Mode External Clock
Receiver Interrupt Enable
TCR2 Clock/Gate Control
Transmit Interrupt Enable
TCR1 Prescaler Control
TCR2 Prescaler Control
TPURAM Array Disable
Supervisor/Unrestricted
Serial Clock Baud Rate
Test Submodule Reset
TPURAM Array Space
Address Space Select
Supervisor/User State
Transmit Data RAM
Show Cycle Enable
QSPI Finished Flag
Receive Data RAM
Transmit Complete
Transmitter Enable
TPU FREEZE Flag
Receiver Wakeup
Synthesizer Lock
Receiver Enable
Receiver Active
SCI Baud Rate
System Reset
Reset Enable
Trace Enable
QSPI Enable
Stop Enable
Send Break
LIMP Mode
Read/Write
Stop Flag
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Name
REGISTER SUMMARY
QSMCR, TPUMCR, TRAMMCR
QSMCR, SIMCR, TPUMCR
CSOR[0:10], CSORBT
CSOR[0:10], CSORBT
CSOR[0:10], CSORBT
Register Location
TRAMMCR
TRAMBAR
QSPI RAM
QSPI RAM
TPUMCR
TPUMCR
TPUMCR
TPUMCR
SYNCR
SYNCR
SYNCR
SYNCR
SYNCR
SCCR1
SCCR1
SCCR1
SCCR1
SCCR0
SPCR0
SPCR1
SPCR2
SYPCR
SYPCR
SYPCR
SCCR1
SCCR1
SCCR1
SIMCR
SIMCR
SCSR
SCSR
SCDR
DSSR
SCSR
SCSR
DSSR
SPSR
PITR
RSR
RSR
RSR
SR
SR
D-43