MC68332GVEH25 Freescale Semiconductor, MC68332GVEH25 Datasheet - Page 248

IC MCU 32BIT 25MHZ 132-PQFP

MC68332GVEH25

Manufacturer Part Number
MC68332GVEH25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332GVEH25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
132-QFP
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
25MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Data Ram Size
2 KB
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
15
Number Of Timers
16
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332GVEH25
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC68332GVEH25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CIRL — Channel Interrupt Request Level
CIBV — Channel Interrupt Base Vector
D.5.6 CIER — Channel Interrupt Enable Register
CH[15:0] — Channel Interrupt Enable/Disable
D.5.7 CFSR0 — Channel Function Select Register 0
D.5.8 CFSR1 — Channel Function Select Register 1
D.5.9 CFSR2 — Channel Function Select Register 2
D.5.10 CFSR3 — Channel Function Select Register 3
CHANNEL[15:0] — Encoded Time Function for each Channel
D-34
CH 15
15
15
15
15
15
0
0
0
0
0
This three-bit encoded field specifies the interrupt request level for all channels. Level
seven for this field indicates a nonmaskable interrupt; level zero indicates that all chan-
nel interrupts are disabled.
The TPU is assigned 16 unique interrupt vector numbers, one vector number for each
channel. The CIBV field specifies the most significant nibble of all 16 TPU channel in-
terrupt vector numbers. The lower nibble of the TPU interrupt vector number is deter-
mined by the channel number on which the interrupt occurs.
Encoded four-bit fields in the channel function select registers specify one of 16 time
functions to be executed on the corresponding channel.
RESET:
RESET:
RESET:
RESET:
RESET:
0 = Channel interrupts disabled
1 = Channel interrupts enabled
CH 14
CHANNEL15
CHANNEL11
CHANNEL7
CHANNEL3
14
14
14
14
14
0
0
0
0
0
CH 13
13
13
13
13
13
0
0
0
0
0
CH 12
12
12
12
12
12
0
0
0
0
0
Freescale Semiconductor, Inc.
CH 11
11
11
11
11
11
For More Information On This Product,
0
0
0
0
0
CH 10
CHANNEL14
CHANNEL10
10
10
10
10
10
CHANNEL6
CHANNEL2
0
0
0
0
0
Go to: www.freescale.com
REGISTER SUMMARY
CH 9
9
0
9
0
9
0
9
0
9
0
CH 8
8
0
8
0
8
0
8
0
8
0
CH 7
7
0
7
0
7
0
7
0
7
0
CH 6
CHANNEL13
CHANNEL9
CHANNEL5
CHANNEL1
6
0
6
0
6
0
6
0
6
0
CH 5
5
0
5
0
5
0
5
0
5
0
CH 4
4
0
4
0
4
0
4
0
4
0
CH 3
3
0
3
0
3
0
3
0
3
0
USER’S MANUAL
CH 2
CHANNEL12
CHANNEL8
CHANNEL4
CHANNEL0
2
0
2
0
2
0
2
0
2
0
$YFFE0A
$YFFE0C
$YFFE0E
$YFFE10
$YFFE12
CH 1
1
0
1
0
1
0
1
0
1
0
MC68332
CH 0
0
0
0
0
0
0
0
0
0
0

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