MC68332GVEH25 Freescale Semiconductor, MC68332GVEH25 Datasheet - Page 184

IC MCU 32BIT 25MHZ 132-PQFP

MC68332GVEH25

Manufacturer Part Number
MC68332GVEH25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332GVEH25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
132-QFP
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
25MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Data Ram Size
2 KB
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
15
Number Of Timers
16
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332GVEH25
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC68332GVEH25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
A-10
Num
30A
39A
46A
47A
47B
31
33
35
37
39
46
48
53
54
55
56
57
70
71
72
73
74
75
76
77
78
CLKOUT Low to Data In High Impedance
DSACK[1:0] Asserted to Data In Valid
Clock Low to BG Asserted/Negated
BR Asserted to BG Asserted (RMC Not Asserted)
BGACK Asserted to BG Negated
BG Width Negated
BG Width Asserted
R/W Width Asserted (Write or Read)
R/W Width Asserted (Fast Write or Read Cycle)
Asynchronous Input Setup Time
Asynchronous Input Hold Time
DSACK[1:0] Asserted to BERR, HALT Asserted
Data Out Hold from Clock High
Clock High to Data Out High Impedance
R/W Asserted to Data Bus Impedance Change
RESET Pulse Width (Reset Instruction)
BERR Negated to HALT Negated (Rerun)
Clock Low to Data Bus Driven (Show)
Data Setup Time to Clock Low (Show)
Data Hold from Clock Low (Show)
BKPT Input Setup Time
BKPT Input Hold Time
Mode Select Setup Time
Mode Select Hold Time
RESET Assertion Time
RESET Rise Time
BR, BGACK, DSACK[1:0], BERR, AVEC, HALT
(V
Table A-6 16.78 MHz AC Timing (Continued)
DD
Freescale Semiconductor, Inc.
13
and V
For More Information On This Product,
12
Characteristic
DDSYN
ELECTRICAL CHARACTERISTICS
Go to: www.freescale.com
= 5.0 Vdc
9
7
10%, V
11
10
SS
= 0 Vdc, T
A
= T
Symbol
t
t
t
t
t
t
t
BRAGA
t
t
t
t
t
t
CLBAN
t
SCLDD
SCLDS
SCLDH
t
t
t
t
t
t
RWAS
t
HRPW
GAGN
t
DOCH
CHDH
RADC
BNHN
t
t
L
CLDH
DABA
BKHT
RSTA
RSTR
BKST
DADI
RWA
AIHT
t
t
AIST
MSS
MSH
GH
GA
to T
H
)
Min
150
512
90
15
40
15
10
15
10
20
1
1
2
1
5
0
0
0
0
4
USER’S MANUAL
Max
90
50
29
30
28
29
10
2
MC68332
Unit
t
t
t
t
t
t
t
t
ns
ns
ns
cyc
cyc
cyc
cyc
ns
ns
ns
ns
ns
ns
ns
ns
cyc
ns
ns
ns
ns
ns
ns
cyc
ns
cyc
cyc

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