MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 32

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

J1850_TX
J1850_RX
PSC1_2
PSC1_3
PSC1_4
TDO
TCK
TDI
Pin
0x7D
STD_PU
0x7E
STD_PU
0x7F
STD_PU
0x80
STD_PU_ST
0x81
STD_PU_ST
and Offset
Register
Control
Pad I/O
—
—
—
1
2
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
ALT0
ALT1
ALT2
ALT3
Function
Alternate
3
PSC1_2
TPA2
GPT1[7]
IRQ1
PSC1_3
CKSTP_IN
NFC_R/B2
GPIO19
PSC1_4
CKSTP_OUT
NFC_CE2
GPIO20
J1850_TX
—
NFC_CE3
I2C1_SCL
J1850_RX
—
NFC_R/B3
I2C1_SDA
TCK
—
—
—
TDI
—
—
—
TDO
—
—
—
Table 2. MPC5125 Pin Multiplexing (continued)
Functions
4
JTAG
PSC1
GPT1
PSC1
NFC
GPIO1
PSC1
MFC
GPIO1
J1850
—
NFC
I
J1850
—
NFC
I
JTAG
—
—
—
JTAG
—
—
—
JTAG
—
—
—
2
2
Peripheral
C1
C1
5
Direction
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
—
—
—
—
—
—
—
—
—
O
O
O
O
O
O
I
I
I
I
Power Domain
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
5. This pin contains an
enabled internal Schmitt
trigger.
3. This JTAG pin has an
internal pullup P-FET, and
cannot be configured.
Notes
—
—
—
—
—
—
B14
D13
A15
C16
C15
B16
Pin
B5
C6