MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 84

• Manufacturer Part Number: MPC5125YVN400
• Description: IC MCU 32BIT E300 324TEPBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC51xxr

Specifications of MPC5125YVN400

• Core Processor: e300
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, USB OTG
• Peripherals: DMA, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.33 V ~ 1.47 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC51xx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
• Maximum Clock Frequency: 400 MHz
• Operating Supply Voltage: 1.4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 3.3 V
• Interface Type: CAN, I2C
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 32 bit
• Cpu Speed: 400MHz
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Digital Ic Case Style: TEPBGA
• No. Of Pins: 324
• Rohs Compliant: Yes
• Cpu Family: MPC5xx
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 32KB
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System Design Information
For a board with a COP (common on-chip processor) connector that accesses the JTAG interface and needs to reset the JTAG
module, it is not recommended to wire only TRST and PORESET.
To reset the MPC5125 via the COP connector, the HRESET pin of the COP should be connected to the HRESET pin of the
MPC5125. The circuitry shown in
sources can drive PORESET.
84
NOTES:
1
2
3
BDM Pin #
With respect to the emulator tool’s perspective:
Input is really an output from the embedded e300 core.
Output is really an input to the core.
From the board under test, power sense for chip power.
HALTED is not available from e300 core.
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
See Note
CKSTP_OUT
CKSTP_IN
See Note
HRESET
SRESET
I / O Pin
TRST
TMS
TDO
TCK
TDI
—
—
—
—
—
Figure 51
pci_frame
MPC5125 Microcontroller Data Sheet, Rev. 3
3
Table 49. COP / BDM Interface Signals
allows the COP to assert HRESET or TRST separately, while any other board
BDM Connector
ckstp_out
ckstp_in
halted
hreset
sreset
VDD
qack
GND
GND
KEY
N / C
tms
trst
tdo
tck
tdi
2
4
3
Pullup / Pulldown
Internal
Pullup
Pullup
Pullup
Pullup
Pullup
Pullup
—
—
—
—
—
—
—
—
—
—
Pullup / Pulldown
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
10 kΩ Pullup
External
—
—
—
—
—
—
—
—
Freescale Semiconductor
I / O
—
—
—
—
—
O
O
O
O
O
O
O
O
I
I
I
1