MC56F8147VPYE Freescale Semiconductor, MC56F8147VPYE Datasheet - Page 112

IC DSP 16BIT 40MHZ 160-LQFP

MC56F8147VPYE

Manufacturer Part Number
MC56F8147VPYE
Description
IC DSP 16BIT 40MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8147VPYE

Core Processor
56800
Core Size
16-Bit
Speed
40MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Data Bus Width
16 bit
Processor Series
MC56F81xx
Core
56800E
Data Ram Size
4 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
76
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
4 x 12 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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6.5.7.7
Selects clock to be muxed out on the CLKO pin.
6.5.8
The GPIO Peripheral Select register can be used to multiplex out any one of the three alternate peripherals
for GPIOC. The default peripheral is Quad Decoder 1 and Quad Timer B (NOT available in the 56F8147
device); these peripherals work together.
The four I/O pins associated with GPIOC can function as GPIO, Quad Decoder 1/Quad Timer B, or as
SPI 1 signals. GPIO is not the default and is enabled/disabled via the GPIOC_PER, as shown in
Figure 6-10
choice between decoder/timer and SPI inputs/outputs is made in the SIM_GPS register and in conjunction
with the Quad Timer Status and Control Registers (SCR). The default state is for the peripheral function
of GPIOC[3:0] to be programmed as decoder functions. This can be changed by altering the appropriate
controls in the indicated registers.
112
00000 = SYS_CLK (from OCCS - DEFAULT)
00001 = Reserved for factory test—56800E clock
00010 = Reserved for factory test—XRAM clock
00011 = Reserved for factory test—PFLASH odd clock
00100 = Reserved for factory test—PFLASH even clock
00101 = Reserved for factory test—BFLASH clock
00110 = Reserved for factory test—DFLASH clock
00111 = Oscillator output
01000 = F
01001 = Reserved for factory test—IPB clock
01010 = Reserved for factory test—Feedback (from OCCS, this is path to PLL)
01011 = Reserved for factory test—Prescaler clock (from OCCS)
01100 = Reserved for factory test—Postscaler clock (from OCCS)
01101 = Reserved for factory test—SYS_CLK2 (from OCCS)
01110 = Reserved for factory test—SYS_CLK_DIV2
01111 = Reserved for factory test—SYS_CLK_D
10000 = ADCA clock
10001 = ADCB clock
GPIO Peripheral Select Register (SIM_GPS)
CLockout Select (CLKOSEL)—Bits 4–0
and
out
Table
(from OCCS)
6-2. When GPIOC[3:0] are programmed to operate as peripheral I/O, then the
56F8347 Technical Data, Rev.11
Freescale Semiconductor
Preliminary

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