R5F212A8SNFP#U0 Renesas Electronics America, R5F212A8SNFP#U0 Datasheet - Page 532

• Manufacturer Part Number: R5F212A8SNFP#U0
• Description: IC R8C/2A MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Ar

Specifications of R5F212A8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
20.4.5
Table 20.6
NOTE:
1
1
0
FMR07(SR5) FMR06(SR4)
1. The MCU enters read array mode when FFh is written in the second bus cycle of these commands.
FRM0 Register (Status
When an error occurs, bits FMR06 to FMR07 in the FMR0 register are set to 1, indicating the occurrence of an
error. Therefore, checking these status bits (full status check) can be used to determine the execution result.
Table 20.6 lists the Errors and FMR0 Register Status. Figure 20.16 shows the Full Status Check and Handling
Procedure for Individual Errors.
At the same time, the command code written in the first bus cycle is disabled.
Register) Status
Nov 26, 2007
Full Status Check
Errors and FMR0 Register Status
1
0
1
Page 510 of 580
Command
sequence
error
Erase error
Program error
Error
• When the block erase command is executed but auto-
• When the program command is executed but not auto-
• When a command is not written correctly
• When invalid data other than that which can be written
• When the program command or block erase command
• When an address not allocated in flash memory is input
• When attempting to erase the block for which rewriting
• When an address not allocated in flash memory is input
• When attempting to write to a block for which rewriting
in the second bus cycle of the block erase command is
written (i.e., other than D0h or FFh)
is executed while rewriting is disabled by the FMR02 bit
in the FMR0 register, or the FMR15 or FMR16 bit in the
FMR1 register.
during erase command input
is disabled during erase command input.
during write command input.
is disabled during write command input.
erasure does not complete correctly
programming does not complete.
Error Occurrence Condition
(1)
20. Flash Memory