R5F212A8SNFP#U0 Renesas Electronics America, R5F212A8SNFP#U0 Datasheet - Page 492

IC R8C/2A MCU FLASH 64LQFP

R5F212A8SNFP#U0

Manufacturer Part Number
R5F212A8SNFP#U0
Description
IC R8C/2A MCU FLASH 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Ar
Datasheets

Specifications of R5F212A8SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
17.5
Table 17.2
Synch Break detection
Synch Break generation
completed
Synch Field
measurement completed
Bus collision detection
There are four interrupt requests that are generated by the hardware LIN: Synch Break detection, Synch Break
generation completed, Synch Field measurement completed, and bus collision detection. These interrupts are
shared with timer RA.
Table 17.2 lists the Interrupt Requests of Hardware LIN.
Interrupt Request
Interrupt Requests
Nov 26, 2007
Interrupt Requests of Hardware LIN
Page 470 of 580
Status Flag
BCDCT
SBDCT
SFDCT
Generated when timer RA has underflowed after measuring
the “L” level duration of RXD0 input, or when a “L” level is
input for a duration longer than the Synch Break period
during communication.
Generated when “L” level output to TXD0 for the duration set
by timer RA completes.
Generated when measurement for 6 bits of the Synch Field
by timer RA is completed.
Generated when the RXD0 input and TXD0 output values
differed at data latch timing while UART0 is enabled for
transmission.
Cause of Interrupt
17. Hardware LIN

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