MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 295

IC MCU 36K FLASH 2K RAM 64-LQFP

MC9S08LC36LH

Manufacturer Part Number
MC9S08LC36LH
Description
IC MCU 36K FLASH 2K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08LC36LH

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
36KB (36K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 2x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
S08LC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
I2C/SCI/SPI1/SPI2
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
18
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Minimum Operating Temperature
- 40 C
On-chip Adc
2-ch x 12-bit
For Use With
DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08LC36LH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
16.1.3
The ACMP has the following features:
16.1.4
This section defines the ACMP operation in wait, stop, and background debug modes.
16.1.4.1
The ACMP continues to run in wait mode if enabled before executing the WAIT instruction. Therefore,
the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt, ACIE, is enabled. For
lowest possible current consumption, the ACMP should be disabled by software if not required as an
interrupt source during wait mode.
16.1.4.2
The ACMP is disabled in all stop modes, regardless of the settings before executing the STOP instruction.
Therefore, the ACMP cannot be used as a wake up source from stop modes.
During either stop1 or stop2 mode, the ACMP module will be fully powered down. Upon wake-up from
stop1 or stop2 mode, the ACMP module will be in the reset state.
During stop3 mode, clocks to the ACMP module are halted. No registers are affected. In addition, the
ACMP comparator circuit will enter a low power state. No compare operation will occur while in stop3.
If stop3 is exited with a reset, the ACMP will be put into its reset state. If stop3 is exited with an interrupt,
the ACMP continues from the state it was in when stop3 was entered.
16.1.4.3
When the microcontroller is in active background mode, the ACMP will continue to operate normally.
16.1.5
The block diagram for the analog comparator module is shown
Freescale Semiconductor
Full rail-to-rail supply operation.
Less than 40 mV of input offset.
Less than 15 mV of hysteresis.
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator
output.
Option to compare to fixed internal bandgap reference voltage.
Option to allow comparator output to be visible on a pin, ACMPO.
Features
Modes of Operation
Block Diagram
ACMP in Wait Mode
ACMP in Stop Modes
ACMP in Active Background Mode
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Figure
Chapter 16 Analog Comparator (S08ACMPV2)
16-2.
295

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