MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 219

• Manufacturer Part Number: MC9S08LC36LH
• Description: IC MCU 36K FLASH 2K RAM 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LC36LH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 36KB (36K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 2x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: S08LC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: I2C/SCI/SPI1/SPI2
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 18
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2-ch x 12-bit
• For Use With: DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.2
The SCI has eight 8-bit registers to control baud rate, select SCI options, report SCI status, and for
transmit/receive data.
Refer to the direct-page register summary in the
assignments for all SCI registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
12.2.1
This pair of registers controls the prescale divisor for SCI baud rate generation. To update the 13-bit baud
rate setting [SBR12:SBR0], first write to SCIBDH to buffer the high half of the new value and then write
to SCIBDL. The working value in SCIBDH does not change until SCIBDL is written.
SCIBDL is reset to a non-zero value, so after reset the baud rate generator remains disabled until the first
time the receiver or transmitter is enabled (RE or TE bits in SCIC2 are written to 1).
Freescale Semiconductor
SBR[12:8]
Reset
Reset
Field
4:0
W
W
R
R
Register Definition
SBR7
SCI Baud Rate Registers (SCIBDH, SCIBHL)
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16×BR). See also BR bits in
0
0
0
7
7
= Unimplemented or Reserved
SBR6
0
0
0
6
6
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Table 12-1. SCIBDH Register Field Descriptions
Figure 12-5. SCI Baud Rate Register (SCIBDH)
Figure 12-6. SCI Baud Rate Register (SCIBDL)
SBR5
0
0
0
5
5
Memory
SBR12
SBR4
0
0
4
4
Description
chapter of this data sheet for the absolute address
SBR11
SBR3
Chapter 12 Serial Communications Interface (S08SCIV3)
3
0
3
0
SBR10
SBR2
0
1
2
2
SBR9
SBR1
0
0
1
1
Table
12-2.
SBR8
SBR0
0
0
0
0
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