MC9S08LC36LH Freescale Semiconductor, MC9S08LC36LH Datasheet - Page 19

• Manufacturer Part Number: MC9S08LC36LH
• Description: IC MCU 36K FLASH 2K RAM 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LC36LH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 36KB (36K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 2x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: S08LC
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: I2C/SCI/SPI1/SPI2
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 18
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2-ch x 12-bit
• For Use With: DEMO9S08LC60 - BOARD DEMO FOR 9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section Number
16.1 Introduction ...................................................................................................................................293
16.2 External Signal Description ..........................................................................................................297
16.3 Register Definition ........................................................................................................................297
16.4 Functional Description ..................................................................................................................299
17.1 Introduction ...................................................................................................................................301
17.2 Background Debug Controller (BDC) ..........................................................................................302
17.3 On-Chip Debug System (DBG) ....................................................................................................310
Freescale Semiconductor
15.6.1
15.6.2
16.1.1
16.1.2
16.1.3
16.1.4
16.1.5
16.3.1
17.1.1
17.2.1
17.2.2
17.2.3
17.2.4
17.3.1
17.3.2
17.3.3
17.3.4
17.3.5
17.3.6
External Pins and Routing ............................................................................................288
15.6.1.1 Analog Supply Pins ......................................................................................288
15.6.1.2 Analog Reference Pins ..................................................................................289
15.6.1.3 Analog Input Pins .........................................................................................289
Sources of Error ............................................................................................................290
15.6.2.1 Sampling Error ..............................................................................................290
15.6.2.2 Pin Leakage Error .........................................................................................290
15.6.2.3 Noise-Induced Errors ....................................................................................290
15.6.2.4 Code Width and Quantization Error .............................................................291
15.6.2.5 Linearity Errors .............................................................................................291
15.6.2.6 Code Jitter, Non-Monotonicity and Missing Codes ......................................292
ACMP/TPM1 Configuration Information ....................................................................293
AMCPO Availability ....................................................................................................293
Features .........................................................................................................................295
Modes of Operation ......................................................................................................295
16.1.4.1 ACMP in Wait Mode ....................................................................................295
16.1.4.2 ACMP in Stop Modes ...................................................................................295
16.1.4.3 ACMP in Active Background Mode .............................................................295
Block Diagram ..............................................................................................................295
ACMP Status and Control Register (ACMPSC) ..........................................................298
Features .........................................................................................................................301
BKGD Pin Description .................................................................................................302
Communication Details ................................................................................................303
BDC Commands ...........................................................................................................307
BDC Hardware Breakpoint ..........................................................................................309
Comparators A and B ...................................................................................................310
Bus Capture Information and FIFO Operation .............................................................310
Change-of-Flow Information ........................................................................................311
Tag vs. Force Breakpoints and Triggers .......................................................................311
Trigger Modes ..............................................................................................................312
Hardware Breakpoints ..................................................................................................314
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Analog Comparator (S08ACMPV2)
Development Support
Chapter 16
Chapter 17
Title
Page
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