C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 92
![IC 8051 MCU 64K FLASH 48-QFP](/photos/12/17/121736/c8051f501-iq_sml.jpg)
C8051F501-IQ
Manufacturer Part Number
C8051F501-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F501-IQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1512
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F501-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F501-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F50x/F51x
11.3. CIP-51 Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the datasheet associated with their corresponding sys-
tem function.
92
Notes on Registers, Operands and Addressing Modes:
Rn —Register R0–R7 of the currently selected register bank.
@Ri —Data RAM location addressed indirectly through R0 or R1.
rel —8-bit, signed (two’s complement) offset relative to the first byte of the following instruction. Used by
SJMP and all conditional jumps.
direct —8-bit internal data location’s address. This could be a direct-access Data RAM location (0x00–
0x7F) or an SFR (0x80–0xFF).
#data —8-bit constant
#data16 —16-bit constant
bit —Direct-accessed bit in Data RAM or SFR
addr11 —11-bit destination address used by ACALL and AJMP. The destination must be within the
same 2 kB page of program memory as the first byte of the following instruction.
addr16 —16-bit destination address used by LCALL and LJMP. The destination may be anywhere within
the 64 kB program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Rev. 1.2
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