C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 68

• Manufacturer Part Number: C8051F501-IQ
• Description: IC 8051 MCU 64K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F501-IQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Package: 48PQFP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1512

C8051F50x/F51x
SFR Definition 6.11. ADC0LTH: ADC0 Less-Than Data High Byte
SFR Address = 0xC6; SFR Page = 0x00
SFR Definition 6.12. ADC0LTL: ADC0 Less-Than Data Low Byte
SFR Address = 0xC5; SFR Page = 0x00
6.4.1. Window Detector In Single-Ended Mode
Figure 6.6
ADC0LTH:ADC0LTL = 0x0200 (512d) and ADC0GTH:ADC0GTL = 0x0100 (256d). The input voltage can
range from 0 to V
value. The repeat count is set to one. In the left example, an AD0WINT interrupt will be generated if the
ADC0 conversion word (ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL and
ADC0LTH:ADC0LTL (if 0x0100 < ADC0H:ADC0L < 0x0200). In the right example, and AD0WINT interrupt
will be generated if the ADC0 conversion word is outside of the range defined by the ADC0GT and
ADC0LT registers (if ADC0H:ADC0L < 0x0100 or ADC0H:ADC0L > 0x0200). Figure 6.7 shows an exam-
ple using left-justified data with the same comparison values.
68
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
ADC0LTH[7:0] ADC0 Less-Than Data Word High-Order Bits.
ADC0LTL[7:0] ADC0 Less-Than Data Word Low-Order Bits.
Name
Name
7
0
7
0
shows
REF
x (4095/4096) with respect to GND, and is represented by a 12-bit unsigned integer
two
6
0
6
0
example
5
0
5
0
window
Rev. 1.2
ADC0LTH[7:0]
ADC0LTL[7:0]
4
0
4
0
comparisons
R/W
R/W
Function
Function
3
0
3
0
for
2
0
2
0
right-justified
1
0
1
0
data
0
0
0
0
with