C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 190

IC 8051 MCU 64K FLASH 48-QFP

C8051F501-IQ

Manufacturer Part Number
C8051F501-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Datasheets

Specifications of C8051F501-IQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F501-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F501-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F50x/F51x
SFR Definition 20.10. P3MASK: Port 3 Mask Register
SFR Address = 0xAF; SFR Page = 0x00
SFR Definition 20.11. P3MAT: Port 3 Match Register
SFR Address = 0xAE; SFR Page = 0x00
190
Note: P3.1–P3.7 are only available on the 48-pin and 40-pin packages
Note: P3.1–P3.7 are only available on the 48-pin and 40-pin packages
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
P3MASK[7:0]
P3MAT[7:0]
Name
Name
7
0
7
1
Port 1 Mask Value.
Selects P3 pins to be compared to the corresponding bits in P3MAT.
0: P3.n pin logic value is ignored and cannot cause a Port Mismatch event.
1: P3.n pin logic value is compared to P3MAT.n.
Port 3 Match Value.
Match comparison value used on Port 3 for bits in P3MAT which are set to 1.
0: P3.n pin logic value is compared with logic LOW.
1: P3.n pin logic value is compared with logic HIGH.
6
0
6
1
5
0
5
1
Rev. 1.2
4
P3MASK[7:0]
0
4
1
P3MAT[7:0]
R/W
R/W
Function
Function
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1

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