C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 41

• Manufacturer Part Number: C8051F501-IQ
• Description: IC 8051 MCU 64K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F501-IQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Package: 48PQFP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1512

5.2. Electrical Characteristics
Table 5.2. Global Electrical Characteristics
–40 to +125 °C, 24 MHz system clock unless otherwise specified.
Supply Input Voltage (V
Digital Supply Voltage (V
Analog Supply Voltage (VDDA)
(Must be connected to V
Digital Supply RAM Data
Retention Voltage
Port I/O Supply Voltage (V
SYSCLK (System Clock)
T
T
Specified Operating
Temperature Range
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from Flash)
I
Notes:
DD
SYSH
SYSL
4
1. Given in Table 5.4 on page 46.
2. V
3. SYSCLK must be at least 32 kHz to enable debugging.
4. Based on device characterization data; Not production tested. Does not include oscillator supply current.
5. IDD can be estimated for frequencies
6. Idle IDD can be estimated for frequencies
frequency sensitivity number for that range. When using these numbers to estimate I
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number. For example: V
frequency sensitivity number for that range. When using these numbers to estimate Idle I
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number. 
For example: V
(SYSCLK Low Time)
(SYSCLK High Time)
20 MHz) * 0.48 mA/MHz = 11.6 mA.
IO
Parameter
should not be lower than the V
DD
= 2.6 V; F = 5 MHz, Idle I
REGIN
DD
DD
3
IO
)
)
)
)
System Clock < 25 MHz
System Clock > 25 MHz
System Clock < 25 MHz
System Clock > 25 MHz
Normal Operation
V
V
V
V
DD
DD
DD
DD
= 2.1 V, F = 200 kHz
= 2.1 V, F = 1.5 MHz
= 2.1 V, F = 25 MHz
= 2.1 V, F = 50 MHz
DD
DD
voltage.
= 2.6 V; F = 20 MHz, I
<
12.5 MHz by simply multiplying the frequency of interest by the
<
Conditions
DD
1 MHz by simply multiplying the frequency of interest by the
Rev. 1.2
= 21 mA – (50 MHz – 5 MHz) x 0.41 mA/MHz = 2.6 mA.
DD
= 26 mA - (50 MHz -
C8051F50x/F51x
V
V
1.8
Min
–40
1.8
RST
RST
—
—
—
—
2
2
0
9
9
2
1
1
Typ
700
1.5
95
10
19
—
—
—
—
—
—
—
—
DD
for >12.5 MHz, the
DD
+125
Max
5.25
2.75
2.75
2.75
2.75
5.25
50
11
21
—
—
—
—
for >1 MHz, the
Units
MHz
mA
mA
µA
µA
ns
ns
°C
V
V
V
V
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