AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 297

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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24.6
24.6.1
24.6.2
24.6.3
6438F–ATARM–21-Jun-10
Main Oscillator
Main Oscillator Connections
Main Oscillator Startup Time
Main Oscillator Control
The Main Oscillator is designed for a 12 MHz fundamental crystal. The 12 MHz is an input of the
PLLA and the UPLL used to generate the 480 MHz USB High Speed Clock (UPLLCK).
Figure 24-4
Figure 24-4. Main Oscillator Block Diagram
The typical crystal connection is illustrated in
characteristics of the Main Oscillator, see the section “DC Characteristics” of the product
datasheet.
Figure 24-5. Typical Crystal Connection
The startup time of the 12 MHz Main Oscillator is given in the section “DC Characteristics” of the
product datasheet.
To minimize the power required to start up the system, the main oscillator is disabled after reset
and slow clock is selected.
The software enables or disables the main oscillator so as to reduce power consumption by
clearing the MOSCEN bit in the Main Oscillator Register (CKGR_MOR).
When disabling the main oscillator by clearing the MOSCEN bit in CKGR_MOR, the MOSCS bit
in PMC_SR is automatically cleared, indicating the main clock is off.
When enabling the main oscillator, the user must initiate the main oscillator counter with a value
corresponding to the startup time of the oscillator. This startup time depends on the crystal fre-
quency connected to the main oscillator.
shows the Main Oscillator block diagram.
XOUT
XIN
XIN
12M Main
PLLA and
Oscillator
XOUT
Divider
UPLL
Figure
24-5. For further details on the electrical
GND
Main Clock
MAINCK
UPLLCK
PLLA Clock
PLLACK
AT91SAM9G45
297

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