AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 1066
![MCU ARM9 324-TFBGA](/photos/12/13/121367/324-tfbga-pkg_sml.jpg)
AT91SAM9G45-CU
Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-CU.pdf
(10 pages)
Specifications of AT91SAM9G45-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9G45-CU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT91SAM9G45-CU
Manufacturer:
Atmel
Quantity:
31
Part Number:
AT91SAM9G45-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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43.8
Table 43-6.
1066
0x100-0x124
0x18-0x1C
0x60-0xFB
0x0-0x4
Offset
0x2C
0x3C
0x4C
0x5C
0x10
0x14
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0x50
0x54
0x58
0xC
0x8
AC97 Controller (AC97C) User Interface
AT91SAM9G45
Register Mapping
Register
Reserved
Mode Register
Reserved
Input Channel Assignment Register
Output Channel Assignment Register
Reserved
Channel A Receive Holding Register
Channel A Transmit Holding Register
Channel A Status Register
Channel A Mode Register
Channel B Receive Holding Register
Channel B Transmit Holding Register
Channel B Status Register
Channel B Mode Register
Codec Channel Receive Holding Register
Codec Channel Transmit Holding Register
Codec Status Register
Codec Mode Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for Peripheral DMA Controller (PDC)
registers related to channel transfers
AC97C_CORHR
AC97C_CARHR
AC97C_CBRHR
AC97C_COTHR
AC97C_CBTHR
AC97C_CATHR
AC97C_CAMR
AC97C_CBMR
AC97C_COMR
AC97C_COSR
AC97C_CASR
AC97C_CBSR
AC97C_OCA
AC97C_IDR
AC97C_IMR
AC97C_ICA
AC97C_IER
AC97C_MR
AC97C_SR
Name
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
Read
Read
Read
Read
Read
Read
Read
Read
Write
Write
Write
Write
Write
–
–
–
–
–
6438F–ATARM–21-Jun-10
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–
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