AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 1087

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

44. True Random Number Generator (TRNG)
44.1
6438F–ATARM–21-Jun-10
Description
The True Random Number Generator (TRNG) passes the American NIST Special Publication
800-22 and Diehard Random Tests Suites.
As soon as the TRNG is enabled (TRNG_CTRL register), the generator provides one 32-bit
value every 84 clock cycles. Interrupt trng_int can be enabled through the TRNG_IER register
(respectively disabled in TRNG_IDR). This interrupt is set when a new random value is available
and is cleared when the status register is read (TRNG_SR register). The flag DATRDY of the
status register (TRNG_ISR) is set when the random data is ready to be read out on the 32-bit
output data register (TRNG_ODATA).
The normal mode of operation checks that the status register flag equals 1 before reading the
output data register when a 32-bit random value is required by the software application.
Figure 44-1. TRNG Data Generation Sequence
trng_cr
enable
trng_int
clock
84 clock cycles
Read TRNG_ODATA
Read TRNG_ISR
84 clock cycles
84 clock cycles
Read TRNG_ODATA
Read TRNG_ISR
AT91SAM9G45
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