PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 87

• Manufacturer Part Number: PIC18F45J50-I/PT
• Description: IC PIC MCU FLASH 32K 2V 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 5-4:
© 2009 Microchip Technology Inc.
SSP2CON2
CMSTAT
PMADDRH/
PMDOUT1H
PMADDRL/
PMDOUT1L
PMDIN1H
PMDIN1L
TXADDRL
TXADDRH
RXADDRL
RXADDRH
DMABCL
DMABCH
UCON
USTAT
UEIR
UIR
UFRMH
UFRML
PMCONH
PMCONL
PMMODEH
PMMODEL
PMDOUT2H
PMDOUT2L
PMDIN2H
PMDIN2L
PMEH
PMEL
PMSTATH
PMSTATL
CVRCON
TCLKCON
DSGPR1
DSGPR0
DSCONH
DSCONL
DSWAKEH
DSWAKEL
Legend:
Note
File Name
(5)
(5)
1:
2:
3:
4:
5:
6:
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved. Bold indicates shared access SFRs.
Bit 21 of the PC is only available in Serial Programming (SP) modes.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes” for details.
These bits and/or registers are only available in 44-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 44-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the same physical registers and addresses, but have
different functions determined by the module’s operating mode. See Section 10.1.2 “Data Registers” for more information.
Parallel Port Out Data High Byte (Buffer 1)
Parallel Master Port Address Low Byte
Parallel Port Out Data Low Byte (Buffer 0)
Parallel Port In Data High Byte (Buffer 1)
Parallel Port In Data Low Byte (Buffer 0)
SPI DMA Transit Data Pointer Low Byte
SPI DMA Receive Data Pointer Low Byte
SPI DMA Byte Count Low Byte
Parallel Port Out Data High Byte (Buffer 3)
Parallel Port Out Data Low Byte (Buffer 2)
Parallel Port In Data High Byte (Buffer 3)
Parallel Port In Data Low Byte (Buffer 2)
Deep Sleep Persistent General Purpose Register (contents retained even in Deep Sleep)
Deep Sleep Persistent General Purpose Register (contents retained even in Deep Sleep)
PTEN15
PMPEN
WAITB1
CVREN
BTSEF
PTEN7
DSFLT
GCEN
GCEN
FRM7
BUSY
DSEN
CSF1
Bit 7
OBE
IBF
—
—
—
—
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F46J50 FAMILY) (CONTINUED)
ACKSTAT
ACKSTAT
PPBRST
WAITB0
PTEN14
CVROE
ENDP3
IRQM1
PTEN6
SOFIF
FRM6
OBUF
CSF0
IBOV
Bit 6
CS1
—
—
—
—
—
—
—
—
—
—
—
—
Parallel Master Port Address High Byte
ADMSK5
STALLIF
WAITM3
PTEN13
ACKDT
ENDP2
PTEN5
DSULP
IRQM0
PSIDL
CVRR
FRM5
Bit 5
SE0
ALP
—
—
—
—
—
—
—
—
—
—
—
—
(4)
ADMSK4
ADRMUX1
WAITM2
PTEN12
DSWDT
PKTDIS
ACKEN
ENDP1
T1RUN
BTOEF
PTEN4
IDLEIF
INCM1
FRM4
Bit 4
—
—
—
—
—
—
—
—
—
—
—
r
(4)
SPI DMA Transit Data Pointer High Byte
SPI DMA Receive Data Pointer High Byte
ADMSK3
ADRMUX0
DFN8EF
WAITM1
PTEN11
USBEN
ENDP0
DSRTC
PTEN3
INCM0
RCEN
TRNIF
FRM3
CS1P
OB3E
CVR3
Bit 3
IB3F
—
—
—
—
—
—
—
PIC18F46J50 FAMILY
(4)
ADMSK2
(Reserved)
CRC16EF
ULPWDIS
RESUME
DSMCLR
MODE16
PTBEEN
WAITM0
PTEN10
ACTVIF
FRM10
PTEN2
FRM2
OB2E
CVR2
Bit 2
PEN
BEP
IB2F
DIR
—
—
—
—
(4)
2
C™ Slave mode. See Section 18.5.3.2 “Address
SPI DMA Receive Data
Pointer High Byte
ADMSK1
DSULPEN
PTWREN
SUSPND
CRC5EF
T3CCP2
UERRIF
WAITE1
MODE1
DSBOR
COUT2
PTEN9
PTEN1
WRSP
RSEN
FRM9
FRM1
OB1E
CVR1
PPBI
Bit 1
IB1F
—
—
(4)
RTCWDIS 0--- -000
RELEASE ---- -000
PTRDEN
T3CCP1
WAITE0
URSTIF
MODE0
DSINT0
DSPOR
COUT1
PTEN8
PTEN0
PIDEF
RDSP
FRM8
FRM0
OB0E
CVR0
Bit 0
SEN
SEN
IB0F
—
—
DS39931C-page 87
0000 0000 67, 264,
---- --11 67, 384
-000 0000 67, 171
0000 0000 67, 174
0000 0000 67, 170
0000 0000 67, 171
0000 0000 67, 171
0000 0000 67, 171
xxxx xxxx 67, 278
---- xxxx 67, 278
xxxx xxxx 67, 278
---- xxxx 67, 278
xxxx xxxx 67, 278
---- --xx 67, 278
-0x0 000- 67, 353
-xxx xxx- 67, 357
0--0 0000 67, 370
-000 0000 67, 367
---- -xxx 67, 359
xxxx xxxx 67, 359
0-00 0000 67, 164
000- 0000 67, 165
0000 0000 68, 166
0000 0000 68, 167
0000 0000 68, 170
0000 0000 68, 170
0000 0000 68, 170
0000 0000 68, 170
0000 0000 68, 168
0000 0000 68, 168
00-- 0000 68, 169
10-- 1111 68, 169
0000 0000 68, 388
---0 --00
xxxx xxxx
xxxx xxxx
---- ---0
0-00 00-1
POR, BOR
Value on
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