PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 456

IC PIC MCU FLASH 32K 2V 44-TQFP

PIC18F45J50-I/PT

Manufacturer Part Number
PIC18F45J50-I/PT
Description
IC PIC MCU FLASH 32K 2V 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F45J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F46J50 FAMILY
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39931C-page 456
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
MOVFF f
0 ≤ f
0 ≤ f
(f
None
The contents of source register ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to
a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register
2
2
MOVFF
s
Read
(src)
read
) → f
1100
1111
No
Q2
=
=
=
=
s
d
≤ 4095
≤ 4095
d
33h
11h
33h
33h
s
REG1, REG2
,f
ffff
ffff
d
operation
Process
Data
No
Q3
s
’ can be anywhere
ffff
ffff
register ‘f’
operation
(dest)
Write
No
d
Q4
ffff
ffff
’.
s
’ are
d
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR Register =
BSR Register =
Q1
Move Literal to Low Nibble in BSR
MOVLW k
0 ≤ k ≤ 255
k → BSR
None
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘0’
regardless of the value of k
1
1
literal ‘k’
MOVLB
Read
0000
Q2
© 2009 Microchip Technology Inc.
02h
05h
0001
Process
5
Data
Q3
kkkk
Write literal
‘k’ to BSR
7
:k
4
.
Q4
kkkk

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