PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 341
![IC PIC MCU FLASH 32K 2V 44-TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F45J50-I/PT
Manufacturer Part Number
PIC18F45J50-I/PT
Description
IC PIC MCU FLASH 32K 2V 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J50-ISS.pdf
(554 pages)
2.PIC18LF24J50-ISS.pdf
(12 pages)
3.PIC18F26J11-ISO.pdf
(28 pages)
Specifications of PIC18F45J50-I/PT
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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20.0
The Analog-to-Digital (A/D) Converter module has
10 inputs for the 28-pin devices and 13 for the 44-pin
devices. Additionally, two internal channels are available
for sampling the V
voltage. This module allows conversion of an analog
input signal to a corresponding 10-bit digital number.
The module has six registers:
• A/D Control Register 0 (ADCON0)
• A/D Control Register 1 (ADCON1)
REGISTER 20-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
VCFG1
R/W-0
2:
3:
10-BIT ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
These channels are not implemented on 28-pin devices.
Performing a conversion on unimplemented channels will return random values.
For best accuracy, the band gap reference circuit should be enabled (ANCON1<7> = 1) at least 10 ms
before performing a conversion on this channel.
VCFG1: Voltage Reference Configuration bit (V
1 = V
0 = AV
VCFG0: Voltage Reference Configuration bit (V
1 = V
0 = AV
CHS<3:0>: Analog Channel Select bits
0000 = Channel 00 (AN0)
0001 = Channel 01 (AN1)
0010 = Channel 02 (AN2)
0011 = Channel 03 (AN3)
0100 = Channel 04 (AN4)
0101 = Channel 05 (AN5)
0110 = Channel 06 (AN6)
0111 = Channel 07 (AN7)
1000 = Channel 08 (AN8)
1001 = Channel 09 (AN9)
1010 = Channel 10 (AN10)
1011 = Channel 11 (AN11)
1100 = Channel 12 (AN12)
1101 = (Reserved)
1110 = V
1111 = V
GO/DONE: A/D Conversion Status bit
When ADON = 1:
1 = A/D conversion in progress
0 = A/D Idle
ADON: A/D On bit
1 = A/D Converter module is enabled
0 = A/D Converter module is disabled
DDCORE
VCFG0
R/W-0
REF
REF
SS
DD
ADCON0: A/D CONTROL REGISTER 0 (ACCESS FC2h)
- (AN2)
+ (AN3)
DDCORE
BG
and V
Absolute Reference (~1.2V)
W = Writable bit
‘1’ = Bit is set
BG
R/W-0
CHS3
absolute reference
(1)
(1)
(1)
R/W-0
CHS2
(2)
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J50 FAMILY
REF
REF
R/W-0
CHS1
• A/D Port Configuration Register 2 (ANCON0)
• A/D Port Configuration Register 1 (ANCON1)
• A/D Result Registers (ADRESH and ADRESL)
The ADCON0 register, in Register 20-1, controls the
operation of the A/D module. The ADCON1 register, in
Register 20-2, configures the A/D clock source,
programmed acquisition time and justification.
The ANCON0 and ANCON1 registers, in Register 20-3
and Register 20-4, configure the functions of the port
pins.
- source)
+ source)
R/W-0
CHS0
x = Bit is unknown
GO/DONE
R/W-0
DS39931C-page 341
ADON
R/W-0
bit 0
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