PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 385

• Manufacturer Part Number: PIC18F45J50-I/PT
• Description: IC PIC MCU FLASH 32K 2V 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.7
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional if enabled. This interrupt will
wake-up the device from Sleep mode when enabled.
Each operational comparator will consume additional
current. To minimize power consumption while in Sleep
mode, turn off the comparators (CON = 0) before
entering Sleep. If the device wakes up from Sleep, the
contents of the CMxCON register are not affected.
TABLE 22-3:
© 2009 Microchip Technology Inc.
INTCON
PIR2
PIE2
IPR2
CMxCON
CVRCON
CMSTAT
ANCON0
TRISA
Legend:
Note 1:
Name
Comparator Operation During
Sleep
(1)
These bits and/or registers are not implemented on 28-pin devices.
— = unimplemented, read as ‘0’. Shaded cells are not related to comparator operation.
GIE/GIEH PEIE/GIEL
PCFG7
OSCFIE
OSCFIP
OSCFIF
CVREN
TRISA7
Bit 7
CON
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
—
(1)
PCFG6
CVROE
TRISA6
CM2IF
CM2IE
CM2IP
Bit 6
COE
—
(1)
PCFG5
TMR0IE
TRISA5
CM1IE
CM1IP
CM1IF
CVRR
CPOL
Bit 5
—
(1)
EVPOL1
PCFG4
INT0IE
USBIF
USBIE
USBIP
Bit 4
—
—
r
PIC18F46J50 FAMILY
22.8
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
EVPOL0
BCL1IE
BCL1IP
TRISA3
BCL1IF
PCFG3
CVR3
RBIE
Bit 3
—
Effects of a Reset
TMR0IF
HLVDIF
HLVDIE
HLVDIP
TRISA2
PCFG2
CREF
CVR2
Bit 2
—
TMR3IF
TMR3IE
TMR3IP
TRISA1
COUT2
PCFG1
INT0IF
CCH1
CVR1
Bit 1
CCP2IF
CCP2IE
CCP2IP
TRISA0
COUT1
PCFG0
CCH0
CVR0
DS39931C-page 385
RBIF
Bit 0
on Page:
Values
Reset
63
65
65
65
64
68
67
68
66