PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 384

• Manufacturer Part Number: PIC18F45J50-I/PT
• Description: IC PIC MCU FLASH 32K 2V 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F46J50 FAMILY
22.6
The comparator interrupt flag is set whenever any of
the following occurs:
The comparator interrupt selection is done by the
EVPOL<1:0>
(CMxCON<4:3>).
In order to provide maximum flexibility, the output of the
comparator may be inverted using the CPOL bit in the
CMxCON register (CMxCON<5>). This is functionally
identical to reversing the inverting and non-inverting
inputs of the comparator for a particular mode.
An interrupt is generated on the low-to-high or high-to-
low transition of the comparator output. This mode of
interrupt generation is dependent on EVPOL<1:0> in
the CMxCON register. When EVPOL<1:0> = 01 or 10,
the interrupt is generated on a low-to-high or high-to-
low transition of the comparator output. Once the
interrupt is generated, it is required to clear the interrupt
flag by software.
TABLE 22-2:
DS39931C-page 384
- Low-to-high transition of the comparator
- High-to-low transition of the comparator
- Any change in the comparator output
output
output
CPOL
Comparator Interrupts
0
1
bits
COMPARATOR INTERRUPT GENERATION
in
EVPOL<1:0>
the
00
01
10
11
00
01
10
11
CMxCON
register
Input Change
Comparator
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
When EVPOL<1:0> = 11, the comparator interrupt flag
is set whenever there is a change in the output value of
either comparator. Software will need to maintain
information about the status of the output bits, as read
from CMSTAT<1:0>, to determine the actual change
that occurred. The CMxIF bits (PIR2<6:5>) are the
Comparator Interrupt Flags. The CMxIF bits must be
reset by clearing them. Since it is also possible to write
a ‘1’ to this register, a simulated interrupt may be
initiated.
Table 22-2
corresponding to comparator input voltages and
EVPOL bit settings.
Both the CMxIE bits (PIE2<6:5>) and the PEIE bit
(INTCON<6>) must be set to enable the interrupt. In
addition, the GIE bit (INTCON<7>) must also be set.
If any of these bits are clear, the interrupt is not
enabled, though the CMxIF bits will still be set if an
interrupt condition occurs.
Figure 22-3 provides a simplified diagram of the
interrupt section.
COUTx Transition
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
provides
© 2009 Microchip Technology Inc.
the
interrupt
Generated
Interrupt
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
generation