PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 64
![IC PIC MCU FLASH 32K 2V 44-TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F45J50-I/PT
Manufacturer Part Number
PIC18F45J50-I/PT
Description
IC PIC MCU FLASH 32K 2V 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J50-ISS.pdf
(554 pages)
2.PIC18LF24J50-ISS.pdf
(12 pages)
3.PIC18F26J11-ISO.pdf
(28 pages)
Specifications of PIC18F45J50-I/PT
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F46J50 FAMILY
TABLE 4-2:
DS39931C-page 64
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
CM1CON
CM2CON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSP1BUF
SSP1ADD
SSP1MSK
SSP1STAT
SSP1CON1
SSP1CON2
ADRESH
ADRESL
ADCON0
ADCON1
WDTCON
PSTR1CON
ECCP1AS
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
2:
3:
4:
5:
(4)
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 4-1 for Reset value for specific condition.
Not implemented for PIC18F2XJ50 devices.
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
PIC18F2XJ50
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
PIC18F4XJ50
Brown-out Reset,
Wake From Deep
Power-on Reset,
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0110 q000
0001 1111
0001 1111
0-11 1100
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1qq- 0000
00-0 0001
0000 0000
Sleep
N/A
N/A
N/A
N/A
RESET Instruction
MCLR Resets
Stack Resets
---- uuuu
uuuu uuuu
---u uuuu
0000 0000
uuuu uuuu
1111 1111
0110 q000
uuuu uuuu
uuuu uuuu
0-qq qquu
uuuu uuuu
uuuu uuuu
u0uu uuuu
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
0qq- 0000
00-0 0001
0000 0000
WDT Reset
CM Resets
N/A
N/A
N/A
N/A
© 2009 Microchip Technology Inc.
Wake-up via WDT
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0110 q00u
uuuu uuuu
uuuu uuuu
u-qq qquu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uqq- uuuu
uu-u uuuu
uuuu uuuu
or Interrupt
N/A
N/A
N/A
N/A
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