C8051F526-IMR Silicon Labs, C8051F526-IMR Datasheet - Page 46

• Manufacturer Part Number: C8051F526-IMR
• Description: 8-bit Microcontrollers - MCU 2KB 12ADC 125C LIN 10Pin MCU
• Manufacturer: Silicon Labs

Specifications of C8051F526-IMR

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 2 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Package / Case: DFN-10
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 6
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 2.7 V, 5.25 V
• Supply Voltage - Min: 2 V, 2.7 V

C8051F52x/F53x
Table 3.7. Pin Definitions for the C8051F53x and C805153xA (QFN 20)
46
Note: Please refer to Section “20. Device Specific Behavior” on page 210.
CNVSTR
V
Name
C2CK
RST/
P0.0/
V
P1.2/
GND
P1.7
P1.6
P1.5
P1.4
P1.3
P1.1
REGIN
V
REF
DD
‘F53x-C
‘F53xA
Pin Numbers
10
12
11
1
2
3
4
5
6
7
8
9
‘F53x
10
12
11
1
2
3
4
5
6
7
8
9
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
A O or
D I/O
D I/O
Type
D In
D In
A In
A In
A In
A In
A In
A In
A In
A In
Description
Device Reset. Open-drain output of internal POR or V
An external source can initiate a system reset by driving this pin
low for at least the minimum RST low time to generate a system
reset, as defined in Table 2.8 on page 32. A 1 k pullup to V
GIN
description.
Clock signal for the C2 Debug Interface.
Port 0.0. See Port I/O Section for a complete description.
External V
Ground.
Core Supply Voltage.
On-Chip Voltage Regulator Input.
Port 1.7. See Port I/O Section for a complete description.
Port 1.6. See Port I/O Section for a complete description.
Port 1.5. See Port I/O Section for a complete description.
Port 1.4. See Port I/O Section for a complete description.
Port 1.3. See Port I/O Section for a complete description.
Port 1.2. See Port I/O Section for a complete description.
External Converter start input for the ADC0, see Section “4. 12-
Bit ADC (ADC0)” on page 52 for a complete description.
Port 1.1. See Port I/O Section for a complete description.
is recommended. See Reset Sources Section for a complete
Rev. 1.4
REF
Input. See V
REF
Section.
DD
monitor.
RE-