C8051F526-IMR Silicon Labs, C8051F526-IMR Datasheet - Page 24

• Manufacturer Part Number: C8051F526-IMR
• Description: 8-bit Microcontrollers - MCU 2KB 12ADC 125C LIN 10Pin MCU
• Manufacturer: Silicon Labs

Specifications of C8051F526-IMR

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 2 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Package / Case: DFN-10
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 6
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 2.7 V, 5.25 V
• Supply Voltage - Min: 2 V, 2.7 V

C8051F52x/F53x
1.9. Port Input/Output
C8051F52x/F52xA/F53x/F53xA devices include up to 16 I/O pins. Port pins are organized as two byte-
wide ports. The port pins behave like typical 8051 ports with a few enhancements. Each port pin can be
configured as a digital or analog I/O pin. Pins selected as digital I/O can be configured for push-pull or
open-drain operation. The “weak pullups” that are fixed on typical 8051 devices may be globally disabled
to save power.
The Digital Crossbar allows mapping of internal digital system resources to port I/O pins. On-chip coun-
ter/timers, serial buses, hardware interrupts, and other digital signals can be configured to appear on the
port pins using the Crossbar control registers. This allows the user to select the exact mix of general-pur-
pose port I/O, digital, and analog resources needed for the application.
24
Highest
Priority
Lowest
Priority
SYSCLK
Outputs
T0, T1
P0
P1
UART
CP0
PCA
SPI
LIN
(P0.0-P0.7)
(P1.0-P1.7*)
Figure 1.9. Port I/O Functional Block Diagram
2
2
2
4
7
2
8
8
Rev. 1.4
PnSKIP Registers
XBR0, XBR1,
Crossbar
Decoder
Priority
Digital
8
8
P0MASK, P0MATCH
P1MASK, P1MATCH
Registers
Cells
Cells
I/O
I/O
P0
P1
*Available in
PnMDIN Registers
devices
PnMDOUT,
'F53x/'F53xA
P0.0
P0.7
P1.0*
P1.7*