W25Q80BVSSIG Winbond Electronics, W25Q80BVSSIG Datasheet - Page 29

• Manufacturer Part Number: W25Q80BVSSIG
• Description: IC FLASH 8MBIT 8SOIC
• Manufacturer: Winbond Electronics

Specifications of W25Q80BVSSIG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 104MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4816329; T1015683

9.2.14
The Fast Read Dual I/O (BBh) instruction allows for improved random access while maintaining two IO
pins, IO
input the Address bits (A23-0) two bits per clock. This reduced instruction overhead may allow for code
execution (XIP) directly from the Dual SPI in some applications.
Fast Read Dual I/O with “Continuous Read Mode”
The Fast Read Dual I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 13a. The
upper nibble of the (M7-4) controls the length of the next Fast Read Dual I/O instruction through the
inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care
(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.
If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Fast Read Dual I/O instruction (after /CS
is raised and then lowered) does not require the BBh instruction code, as shown in figure 13b. This
reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered
after /CS is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next
instruction (after /CS is raised and then lowered) requires the first byte instruction code, thus returning to
normal operation. A “Continuous Read Mode” Reset instruction can also be used to reset (M7-0) before
issuing normal instructions (See 9.2.20 for detail descriptions).
(IO
(IO
(IO
(IO
CLK
CLK
/CS
/CS
DO
DO
DI
DI
0
1
0
1
)
)
)
)
Mode 3
Mode 0
0
0
1
23
Fast Read Dual I/O (BBh)
*
and IO
= MSB
*
6
7
24
Figure 13a. Fast Read Dual I/O Instruction Sequence (Initial instruction or previous M5-4 ≠ 10)
4
5
25
1
Byte 1
. It is similar to the Fast Read Dual Output (3Bh) instruction but with the capability to
0
IOs switch from
Input to Output
2
3
26
1
0
1
27
Instruction (BBh)
2
*
6
7
28
3
4
5
29
Byte 2
4
2
3
30
5
0
1
31
6
*
6
7
32
7
4
5
22
23
33
*
Byte 3
8
2
3
A23-16
20
21
34
- 29 -
9
0
1
18
19
35
10
*
6
7
16
17
36
11
4
5
14
15
37
Byte 4
12
2
3
12
13
38
A15-8
13
Publication Release Date: October 06, 2010
0
1
10
11
39
14
6
7
8
9
15
6
7
16
4
5
17
A7-0
2
3
18
W25Q80BV
0
1
19
*
6
7
20
4
5
M7-0
21
Revision D
2
3
22
0
1
23