MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 89

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MSC8157ETVT1000A

Manufacturer Part Number
MSC8157ETVT1000A
Description
Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MSC8157ETVT1000A

Rohs
yes
Core
SC3850
Data Bus Width
32 bit
Program Memory Size
32 KB
Data Ram Size
512 KB
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
0.97 V to 1.05 V
Maximum Operating Temperature
+ 105 C
Package / Case
FCPBGA-783
Mounting Style
SMD/SMT

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SPI outputs valid—Master mode (internal clock) delay
SPI outputs hold—Master mode (internal clock) delay
SPI outputs valid—Slave mode (external clock) delay
SPI outputs hold—Slave mode (external clock) delay
SPI inputs—Master mode (internal clock) input setup time
SPI inputs—Master mode (internal clock) input hold time
SPI inputs—Slave mode (external clock) input setup time
SPI inputs—Slave mode (external clock) input hold time
Notes: 1.
3.6.5
Table 52
Figure 24
Figure 25
rising edge of the clock, these AC timing diagrams also apply when the falling edge is the active edge.
Figure 25
Freescale Semiconductor
Note: measured with SPMODE[CI] = 0, SPMODE[CP] = 0
Output Signals:
SPICLK (input)
Input Signals:
2.
(See note)
(See note)
lists the SPI input and output AC timing specifications.
provides the AC test load for the SPI.
and
shows the SPI timings in slave mode (external clock).
SPIMOSI
SPIMISO
The symbols used for timing specifications follow the pattern of t
(reference)(state)
t
outputs (O) are invalid (X).
Output specifications are measured from the 50% level of the rising edge of SPICLK to the 50% level of the signal.
Timings are measured at the pin
NIKHOX
SPI Timing
Figure 26
symbolizes the internal timing (NI) for the time SPICLK clock reference (K) goes to the high state (H) until
Parameter
represent the AC timings from
Output
for inputs and t
Figure 25. SPI AC Timing in Slave Mode (External Clock)
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
t
NEIVKH
Table 52. SPI AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
.
Figure 24. SPI AC Test Load
Z
0
= 50 Ω
t
NEIXKH
Table
52. Note that although the specifications generally reference the
Symbol
t
t
t
t
t
t
NEKHOV
NEKHOX
t
t
NIKHOV
NIKHOX
NEIVKH
NEIXKH
NIIVKH
NIIXKH
t
NEKHOV
1
R
L
(first two letters of functional block)(signal)(state)
= 50 Ω
Min
0.5
13
2
0
4
2
V
DDIO
Max
for outputs. For example,
/2
13
7
Electrical Characteristics
Unit
ns
ns
ns
ns
ns
ns
ns
ns
t
NEKHOX
Note
2
2
2
2
89

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