MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 66

• Manufacturer Part Number: MSC8157ETVT1000A
• Description: Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
• Manufacturer: Freescale Semiconductor

Specifications of MSC8157ETVT1000A

• Rohs: yes
• Core: SC3850
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 0.97 V to 1.05 V
• Maximum Operating Temperature: + 105 C
• Package / Case: FCPBGA-783
• Mounting Style: SMD/SMT

Electrical Characteristics
3.5.3.5
Table 25
At recommended operating conditions (see
66
Output
differential
voltage
Output
differential
voltage
Output
differential
voltage
Output
differential
voltage
Output
differential
voltage
Parameter
describes the SGMII SerDes transmitter AC-coupled DC electrical characteristics.
DC-Level Requirements for SGMII Configurations
Symbol
|V
|V
|V
|V
|V
OD
OD
OD
OD
OD
|
|
|
|
|
Table 25. SGMII DC Transmitter Electrical Characteristics
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
0.64 × Nom
0.64 × Nom
0.64 × Nom
0.64 × Nom
0.64 × Nom
Min
Table
4).
Nom
500
459
417
376
333
1.45 × Nom
1.45 × Nom
1.45 × Nom
1.45 × Nom
1.45 × Nom
Max
Unit
mV
mV
mV
mV
mV
1. The |V
2. Amplitude setting:
1. The |V
2. Amplitude setting:
1. The |V
2. Amplitude setting:
1. The |V
2. Amplitude setting:
1. The |V
2. Amplitude setting:
based on the condition of XV
V, no common mode offset variation (V
=500mV), SerDes transmitter is terminated
with 100-Ω differential load between SD_TXn
and SD_TXn.
[A–J]TECR0[AMD_RED] = 0b000000
based on the condition of
XV
offset variation (V
transmitter is terminated with 100-Ω
differential load between SD_TXn and
SD_TXn.
[A–J]TECR0[AMD_RED] = 0b000010
based on the condition of
XV
offset variation (V
transmitter is terminated with 100-Ω
differential load between SD_TXn and
SD_TXn.
[A–J]TECR0[AMD_RED] = 0b000101
based on the condition of
XV
offset variation (V
transmitter is terminated with 100-Ω
differential load between SD_TXn and
SD_TXn.
[A–J]TECR0[AMD_RED] = 0b001000
based on the condition of
XV
offset variation (V
transmitter is terminated with 100-Ω
differential load between SD_TXn and
SD_TXn.
[A–J]TECR0[AMD_RED] = 0b001100
DD_SRDS2-Typ
DD_SRDS2-Typ
DD_SRDS2-Typ
DD_SRDS2-Typ
OD
OD
OD
OD
OD
| value shown in the Typ column is
| value shown in the Typ column is
| value shown in the Typ column is
| value shown in the Typ column is
| value shown in the Typ column is
Conditions
=1.0V, no common mode
=1.0V, no common mode
=1.0V, no common mode
=1.0V, no common mode
Freescale Semiconductor
OS
OS
OS
OS
=500mV), SerDes
=500mV), SerDes
=500mV), SerDes
=500mV), SerDes
DD_SRDS2-Typ
OS
=1.0