MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 69

• Manufacturer Part Number: MSC8157ETVT1000A
• Description: Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
• Manufacturer: Freescale Semiconductor

Specifications of MSC8157ETVT1000A

• Rohs: yes
• Core: SC3850
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 0.97 V to 1.05 V
• Maximum Operating Temperature: + 105 C
• Package / Case: FCPBGA-783
• Mounting Style: SMD/SMT

3.6
This section describes the AC timing characteristics for the MSC8157.
3.6.1
This section describes the AC electrical characteristics for the DDR SDRAM interface.
3.6.1.1
Table 28
Table 29
Freescale Semiconductor
Controller Skew for MDQS—MDQ/MECC
• 1333 MHz data rate
• 1200 MHz data rate
• 1066 MHz data rate
• 800 MHz data rate
• 667 MHz data rate
Tolerated Skew for MDQS—MDQ/MECC
• 1333 MHz data rate
• 1200 MHz data rate
• 1066 MHz data rate
• 800 MHz data rate
• 667 MHz data rate
Notes:
AC input low voltage
AC input high voltage
Note:
provides the input AC timing specifications for the DDR SDRAM when
provides the input AC timing specifications for the DDR SDRAM interface.
1.
2.
3.
4.
At recommended operating conditions with V
AC Timing Characteristics
t
captured with MDQS[n]. Subtract this value from the total timing budget.
At recommended operating conditions with V
The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
by the following equation: t
of t
The t
CISKEW
DDR SDRAM AC Timing Specifications
DDR SDRAM Input AC Timing Specifications
CISKEW
CISKEW
Table 28. DDR3 SDRAM Input AC Timing Specifications for 1.5 V Interface
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that is
.
test coverage is derived from the t
Parameter
Parameter
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
Table 29. DDR SDRAM Input AC Timing Specifications
DISKEW
= ±(T ÷ 4 – abs(t
> 1200 MHz data rate
≤ 1200 MHz data rate
> 1200 MHz data rate
≤ 1200 MHz data rate
DDDDR
DDDDR
DISKEW
of 1.5 ± 5%.
CISKEW
(1.5 V) ± 5%
parameters.
)) where T is the clock period and abs(t
Symbol
t
t
CISKEW
DISKEW
Symbol
V
V
IHAC
ILAC
V
–125
–142
–170
–200
–240
–250
–275
–300
–425
–510
MV
MV
DDDDR
Min
REF
REF
Min
—
+ 0.150
+ 0.175
(typ) = 1.5 V.
Max
DISKEW
125
142
170
200
240
250
275
300
425
510
Electrical Characteristics
CISKEW
MV
MV
.This can be determined
REF
REF
Max
) is the absolute value
—
– 0.150
– 0.175
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Notes
1, 2, 4
Unit
2, 3
V
V
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