MSC8157ETVT1000A Freescale Semiconductor, MSC8157ETVT1000A Datasheet - Page 73

• Manufacturer Part Number: MSC8157ETVT1000A
• Description: Digital Signal Processors & Controllers - DSP, DSC Qual 8157 EN FG 1GHz -45 to 105c
• Manufacturer: Freescale Semiconductor

Specifications of MSC8157ETVT1000A

• Rohs: yes
• Core: SC3850
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 0.97 V to 1.05 V
• Maximum Operating Temperature: + 105 C
• Package / Case: FCPBGA-783
• Mounting Style: SMD/SMT

Figure 11
3.6.1.3
This section describes the DC and AC differential timing specifications for the DDR3 SDRAM controller interface.
shows the differential timing specification.
Table 31
3.6.2
The following subsections define the AC timing requirements for the SerDes reference clocks, the PCI Express data lines, the
Serial RapidIO data lines, and the SGMII data lines.
Freescale Semiconductor
Input AC differential cross-point voltage
Output AC differential cross-point voltage
Note:
provides the DDR3 differential specifications for the differential signals MDQS/MDQS and MCK/MCK.
I/O drivers are calibrated before making measurements.
provides the AC test load for the DDR3 controller bus.
HSSI AC Timing Specifications
DDR3 SDRAM Differential Timing Specifications
VTR specifies the true input signal (such as MCK or MDQS) and VCP is the
complementary input signal (such as MCK or MDQS).
GV
Parameter
GVDD
GND
DD
Output
/2
Table 31. DDR3 SDRAM Differential Electrical Characteristics
Figure 12. DDR3 SDRAM Differential Timing Specifications
MSC8157 Six-Core Digital Signal Processor Data Sheet, Rev. 1
VTR
VCP
Figure 11. DDR3 Controller Bus AC Test Load
Z
0
= 50 Ω
Symbol
V
V
OXAC
IXAC
NOTE
0.5 × VDDDDR –
0.5 × VDDDDR –
R
V
OX
L
= 50 Ω
or V
0.150
0.115
Min
IX
V
DDDDR
0.5 × VDDDDR +
0.5 × VDDDDR +
/2
Electrical Characteristics
0.150
0.115
Max
Figure 12
Unit
V
V
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